[Digitimes] Kaveri delayed

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strata8

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Mar 5, 2013
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That was before AMD internally reorganized their priorities and externally published this:

Where do you see steamroller (a big-core produced on bleeding-edge technology) sitting in the above infographic? On the left or on the right?

That tells you where it sits as a priority within AMD, which should also give some indication of why AMD isn't making it a huge priority to get preliminary results or much in the way of leaks/previews/marketing about it into the public domain.

Doesn't Jaguar have similar IPC to Piledriver despite using 6mm2 for 2 cores compared to 21mm2 for one Piledriver module? That would be pretty telling in itself.
 

Dresdenboy

Golden Member
Jul 28, 2003
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citavia.blog.de
Doesn't Jaguar have similar IPC to Piledriver despite using 6mm2 for 2 cores compared to 21mm2 for one Piledriver module? That would be pretty telling in itself.

Jaguar is a different trade-off. For example, its FMUL throughput is reduced for double or extended precision. The seemingly similar IPC level isn't consistent over a wide range of applications.
 
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pelov

Diamond Member
Dec 6, 2011
3,510
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iirc we didn't have much info on jaguar or the gpu families either. We might get hard numbers some time soon though. If steamroller is another 15%(including clocks) there is no need for AMD to go about advertising it as such. Also that pic seems like the design goals of the big cores have been changed after bd release.

Times are a-changin'. AMD's market share is borderline nonexistent on the server side and their server strategy has consequently been heavily reorganized.

They are now committed to targeting microservers with 64-bit ARM and smaller more efficient cores and leveraging GPGPU rather than big cores for traditional servers. Their <5% market share is lower than ARM, and that's ARM on 32-bit. There's no way in hell AMD is going to claw back there unless they get 14nm-XM access in a relatively quick time frame, but that process is being tuned primarily for mobile SoCs; I've seen no mention at all of a high power compatibility on the 14nm-20nm BEOL node at GloFo.

Intel makes three types of chips: Atom for low end, Haswell/laptops, and Xeons for server.

AMD, too, makes three types of chips: Jaguar for low end, APUs for laptops, and Opteron for server. AMD's Opteron chips are essentially on the AM3+ platform just as SB-E/2011 is the enthusiast/workstation platform for Intel.

As soon as AMD stops advancing the server roadmap then consequently they've stopped advancing on their enthusiast desktop platform as well.

Ever since AMD's Brazos platform, it's been their APUs that have sold better than their desktop and server chips. The margins aren't quite as high, but their margins on the desktop side haven't been stellar since the introduction of the X2.

Bulldozer was awful, but some of the sacrifices the chip made, at least with respect to having a single FPU shared between two integer cores, makes a fair amount of sense and has the potential to tie in well with their GPGPU agenda via their APUs. So I'm not sure big cores will disappear from AMD, but the lack of anything Steamroller-derived on their Opteron roadmap is a telling sign that it might be only APUs from this point forward.

And they aren't even using soi now, it isn't bleeding-edge.

Common platform committed to using bulk for 28nm so AMD had no choice. Going forward, FD-SOI is certainly a possibility.

Globalfoundries, the world&#8217;s second largest contract maker of semiconductors, will start to produce test wafers using its hybrid 14nm eXtreme mobility (XM) process technology as soon as in the first or second quarter of 2014. Early adopters of the technology will be able to produce their test circuits to find out the pros and cons of the process. Unfortunately, the main customer of GlobalFoundries, will not be able to benefit from the 14nm XM FinFET technology.

The 14nm-XM offering is based on a modular technology architecture that uses a 14nm FinFET devices combined with 20nm-LPM process back-end-of-line (BEOL) interconnect flow. Leveraging the maturity of the 20nm-LPM technology will enable a rapid time-to-market as well as a smooth transition for customers looking to tap the benefits of FinFET system-on-chips as soon as possible. According to Globalfoundries, 14-nm FinFETs have a 48-nm fin pitch, which is identical to what Globalfoundries expects about Intel's FinFET fabrication process.

Mike Noonen, executive vice president of worldwide marketing and sales, told EETimes web-site that 14XM mutiproject wafer (MPW) runs could take place in the first or second quarters of 2013 and would be used by early adopters of the process to run test circuits.

Globalfoundries seems to have a clear roadmap for both SOI as well as fully-depleted SOI at 28nm and 20nm. But those technologies use traditional planar transistors, not innovative FinFET transistors, which means that AMD will not be able to match Intel&#8217;s performance and power saving capabilities (Intel claims that tri-gate transistors enable 37% higher speed, or 50% lower power consumption compared to planar transistors) in the foreseeable future; at least, till Globalfoundries and its partners develop ultra high-performance 14nm process technology.



I believe risk production for 20nm is beginning later this year for both TSMC and GloFo while 14nm-XM PDKs have been sent out several months ago.

http://www.xbitlabs.com/news/other/...s_to_Start_14nm_Tests_in_Q1_2013_Company.html

AMD's biggest issue is that these two nodes (or 1 and 3/4??) is that they're primarily being introduced for mobile.

As the market moves away from PCs, so do the foundries. As a result, that puts a lot of pressure on those on wrong side of these trends. While we might get a future Jaguar-ish SoC on GloFo's 14nm-XM, it's extremely unlikely we see anything at all for the big core chips without a significant delay.
 
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Idontcare

Elite Member
Oct 10, 1999
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28nm in production at GloFo since 2011 Gotta love the marketing BS.


From the article:
Specifically, to get a 30% increase in performance over 28nm bulk LPS PolySiON, HPP increases die cost by 30%, while FD-SOI only increases die cost by 10%. (Both HPP and FD-SOI are HKMG/GateFirst).

Ouch. A 20% cost-delta is significant.

I really have to wonder what isn't being said though because if it really was as simple as pushing a button and porting your existing bulk-Si design to an FD-SOI flow, saving yourself 20% production cost in the process, then everybody on the planet that is fabless would be clamoring to have their chips ported over ASAP.

And yet we haven't heard a peep out of TSMC about this. Their customers would be demanding TSMC adopt FD-SOI or risk losing revenue as customers vote with their wallets and go to a foundry that does offer it. But we aren't hearing about it at all.

There must be a bevy of tradeoffs that make the FDSOI option not quite as compelling as the talking points here make it out to be.
 

pelov

Diamond Member
Dec 6, 2011
3,510
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That or GloFo's bulk process is seriously lacking, and much more expensive when compared to TSMC.

At the 16nm/14nm and 10nm nodes, I'd expect those graphs regarding price-to-performance to look considerably worse It's amazing just how quickly we've gotten to 10nm and how few backup plans these foundries have for what happens after. Well, perhaps "few" is the wrong word. 'An epic crapload' would be a more apt description, with everything from 3D stacking, quadruple patterning, to EUV/450mm being thrown about as a way to alleviate customer concerns.

I think the one wildcard here is IBM. There's not a single company on the planet that gets more out of their R&D than IBM. They're like NASA but for everything tech related.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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28nm in production at GloFo since 2011 Gotta love the marketing BS.
There were tape outs for 28nm-SLP from GlobalFoundries in the August to October time frame in 2011.

MIPS, ARM, AMD64(cancelled) are all the architecture trees that taped out for 28-nm SLP in 2011.
 
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Idontcare

Elite Member
Oct 10, 1999
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There was tape outs for 28nm-SLP from GlobalFoundries in the August to October time frame in 2011.

"Tape out" literally and truly has absolutely nothing to do with production, or even a process node per se.

You could design and tape out your own 7nm IC today if you wanted to. You could have done the same in 1985 if you wanted to.

Taping out simply means the design itself is viewed as being complete and ready to be sent to a mask workshop so the litho masks can be made.

To tape out a design all you need is the PDK (process design kit) and PDR (process design rules), and those can literally be made up imaginary specifications if one so desired without any basis in reality.

Right now you could define your own 3nm node specifications on paper, complete with imaginary PDK and PDR, design yourself a 3nm-based IC and "tape out" the chip...but you haven't done anything relating to the physical world yet. No mask shop is going to take your tape-out, no 3nm production line exists to produce your chip, etc.

To get your tape-out into production is what requires a production process node to exist. Otherwise all you have is a taped-out device.

A taped out device says nothing about the production readiness of the node for which it was taped out to be manufactured on.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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Tape-outs show intent of mass production or a finished node. Maximum volume production of 28-nm for Fab 1 was achieved by January 2012. Maximum volume production of 28-nm for Fab 8 was achieved by October 2012.
 

Vesku

Diamond Member
Aug 25, 2005
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GF 28nm production, the way most people think of "production", couldn't have been much sooner than Q4'12. AFAIK, the Rockchip SoC just now showing up is the first available GF 28nm product. Not that Globalfoundries is alone in exaggerating their process progress, just they seem to have the most trouble with volume production. Globalfoundries is competing for last place with UMC.

http://www.globalfoundries.com/newsroom/2013/20130617.aspx
 
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beginner99

Diamond Member
Jun 2, 2009
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Although it's been a painful road, Hector Ruiz saved AMD by buying ATI. Otherwise AMD would have been left to battle Intel in processors and have nothing else worth mentioning in their arsenal.

Ruiz was basically a terrible manager and let his ego cloud his decision making, but credit where credit is due it took a lot of guts and foresight to realize that the CPU/GPU marriage would eventually become THE device.

Really, an apu is "THE device"? Is so why is amd at about 20% market share, still losing money, while Intel still makes a huge profit each quarter?

Exactly. Besides that if AMD had not bought ATI and instead could have done proper R&D for CPUs and process tech who knows were they would be now. I very much doubt they could be any worse of than now.
 

R0H1T

Platinum Member
Jan 12, 2013
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Atleast they moved on from the 2010 with 28nm
Well to be fair 28nm SOI is assumedly better than 22nm bulk, though how does it compare to Intel's FinFET(at the same node) is something worth looking into. So in essence GF >>> Intel, at least as far as marketing slides are concerned
 

mrmt

Diamond Member
Aug 18, 2012
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Exactly. Besides that if AMD had not bought ATI and instead could have done proper R&D for CPUs and process tech who knows were they would be now. I very much doubt they could be any worse of than now.

Did you guys ever hear about merger, partnership or joint-venture, you know, things that would place ATI and its technology under the same umbrella as of AMD, but without the latter having to spend 5.5 billion for that to happen?

Maybe you didn't, but Hector and his boys did. And this is where his failure lies.
 

SiliconWars

Platinum Member
Dec 29, 2012
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So I guess AMD would have done better than GF has with their $15 billion+ capex over the past 3-4 years, including $2 billion on one R&D facility? You guys must have a really high opinion of AMD and their ~$1 billion annual R&D budget for the entire company!

$5.5 billion for ATI would be a pittance today and would barely buy a cutting edge fab.
 

mrmt

Diamond Member
Aug 18, 2012
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$5.5 billion for ATI would be a pittance today and would barely buy a cutting edge fab.

There is a huge difference between negotiate an asset sale having a pitance of cash, not worth to sustain the company through the next fiscal year and negotiate having 5.5 billion in cash, worth a few years of cash burn.
 

SiliconWars

Platinum Member
Dec 29, 2012
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Not really, anyone could see that AMD was going no further than 32nm because the size of the company simply didn't allow for it. There was never any position of strength, they just wanted rid of the manufacturing arm of the company.
 
Aug 11, 2008
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So I guess AMD would have done better than GF has with their $15 billion+ capex over the past 3-4 years, including $2 billion on one R&D facility? You guys must have a really high opinion of AMD and their ~$1 billion annual R&D budget for the entire company!

$5.5 billion for ATI would be a pittance today and would barely buy a cutting edge fab.

Well, it may be a pittance, but isn't 5.5 billion about twice the entire market cap of AMD today?
 

unon

Junior Member
Jan 2, 2013
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Common platform committed to using bulk for 28nm so AMD had no choice. Going forward, FD-SOI is certainly a possibility.

That 'excavator' die shot is probably 28nm fd-soi. Now that they are pretty much leaving high performance server and using ARM they have very less reason to aim for cores / mm^2. The cores are such a small part of the whole chip. If they can match intel ipc and retain clocks, they can be very competitive in laptops and desktops, though with more power. HSA will be good/better for compute.

Idontcare said:
I really have to wonder what isn't being said though because if it really was as simple as pushing a button and porting your existing bulk-Si design to an FD-SOI flow, saving yourself 20% production cost in the process, then everybody on the planet that is fabless would be clamoring to have their chips ported over ASAP.

The most probable reason is it isn't ready and it's not worth it for the low end oem's to port to fd-soi and the high end will probably go for 20nm / 14nm.
 

NTMBK

Lifer
Nov 14, 2011
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Doesn't Jaguar have similar IPC to Piledriver despite using 6mm2 for 2 cores compared to 21mm2 for one Piledriver module? That would be pretty telling in itself.

IPC isn't everything. The Pentium III had higher IPC than the P4, but the P4 was a much better performer (apart from a handful of early Willamette parts).
 

SiliconWars

Platinum Member
Dec 29, 2012
2,346
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Well, it may be a pittance, but isn't 5.5 billion about twice the entire market cap of AMD today?

And it would have been even less had they not bought ATI and instead tried to keep up with Intel in the fab race.

It costs ~$5 billion for a 32nm fab and ~$1 billion for the R&D for it. AMD would have been stuck with their single 32nm fab in Dresden, still paying the wages of 3000 fab guys there and absolutely no chance of progressing further because of being unable to afford the jump to 22nm. Oh, and they wouldn't have ATI or the console wins now.
 

Vesku

Diamond Member
Aug 25, 2005
3,743
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So I guess AMD would have done better than GF has with their $15 billion+ capex over the past 3-4 years, including $2 billion on one R&D facility? You guys must have a really high opinion of AMD and their ~$1 billion annual R&D budget for the entire company!

$5.5 billion for ATI would be a pittance today and would barely buy a cutting edge fab.

I doubt AMD would be doing much better but they certainly aren't benefiting from becoming fabless since they are still tightly contractually tied to their former fab. A fab which is over a year behind the main alternative for AMD, TSMC.
 
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