Does anyone have a strict definition for 'effective address'?

[chrstrbrts]

Hey,

I understand what logical, linear, and physical addresses are, but I can't find a strong definition for 'effective address'.

The term is used in several places in Intel's manual, but I haven't found a definition for it.

Thanks.

 

[exdeath]

Effective address is the calculated linear address in the application memory map that is computed in a given instruction addressing mode. It has to do with what are called addressing modes. Absolute, absolute index, absolute index scaled with offset, and so on.

Effective address is the address which has to be computed when the address mode used has anything other than an immediate absolute address and the full address cannot be known immediately upon fetching the opcode and operands.

If you have something like [EBX+EDI*4] and EBX is 0x10000000, EDI is 3 then "effective address" is computed as 0x1000000C.

Modern Intel CPUs even have dedicated effective address ALUs for accelerating these types of addressing mode opcodes to prevent effective address calculation stalls. Older CPUs would use the main ALU and stall while taking additional cycles to compute the address. Compare cycle times for an absolute mov vs a base+scaled index+offset mov on a 8088 and a Pentium for example.

This is still subject to page and segment translation to form a physical address which are transparent to the programmer and application.

Historically in chips with dedicated EA ALUs for the BIU/MMU it's common to abuse the LEA instruction for non address related general purpose math for free parallel arithmetic and free powers of 2 multiplication without stalling the main ALU. A+B*C+D type calculations were basically free with 1 small compact optimized instruction.

 

[chrstrbrts]

Effective address is the calculated linear address in the application memory map that is computed in a given instruction addressing mode.

OK. So, here you don't mean the linear address in the processor's linear address space that results from segmentation calculations.

You mean a linear address in the program's linear address space that the programmer writes into without regard to the environment in which the resulting process will run. Yes?

This is still subject to page and segment translation to form a physical address which are transparent to the programmer and application.

OK. Now, here you are talking about the processor's linear address space.

The one whose addresses are computed after taking logical addresses and reaching into the GDT to obtain bases addresses and adding offsets. Yes?

Incidentally, I know nothing about programming, but isn't it possible in assembly to declare your own segments when writing a program?

If so, is it possible to use an effective address in your code to jump from one segment to another?

Or, do effective addresses just give you offsets within the given segment?

 

[exdeath]

Effective address has nothing to do with paging or segmentation. It simply means the actual final numerical address that is calculated from an instruction that uses variables or arithmetic in the address operand, eg indexing or scaling.

If you are in protected mode with paging then the EA is still an address in your virtual memory map / linear address space before the page and segment translation occur.

Compare

Mov EAX, [0x1000000C]

Vs

Mov EBX , 0x10000000
Mov EDI , 3
Mov EAX, [EBX +EDI*4]

Both produce a virtual address of 0x1000000C with respect to the applications linear memory map (which is really not linear and undergoes page and segment translation to generate a physical address).

But the second method has to do an effective address calculation to resolve the unknown virtul address.

In 16 bit real mode LEA is an r16 instruction so it only computes the offset portion of the segment : offset addressing.


As for terminology:

Effective address = the resulting linear/virtual address as a result of an opcode that uses arithmetic to generate an offset instead of an immediate absolute value.

Linear address = virtual address = what an application sees, generates, and uses, completely oblivious to any paging or segmentation mechanisms. All EAs are linear/virtual addresses within the applications own memory map. When we say linear address we mean virtual address because it is page tables that give the illusion of linear memory by organizing non contiguous blocks of physical memory in consecutive page table entries.

Physical address = after paging and segmentation translations, what appears on the CPUs external A00 -Ann pins.

 

[exdeath]

Found this

Section 3.7.5 (Specifying an Offset) of the same document states:

The offset part of a memory address can be specified directly as a static value (called a displacement) or through an address computation made up of one or more of the following components:

• Displacement — An 8-, 16-, or 32-bit value.
• Base — The value in a general-purpose register.
• Index — The value in a general-purpose register.
• Scale factor — A value of 2, 4, or 8 that is multiplied by the index value.

The offset which results from adding these components is called an effective address. Each of these components can have either a positive or negative (2s complement) value, with the exception of the scaling factor.

EffectiveAddress calculates an effective address using:

Base + (Index*Scale) + Displacement

 

[chrstrbrts]

Thanks a ton.