EETimes: ST plans for Dresden FDSOI production

[Phynaz]

Yes it is getting worse

I try to post something on topic:

STE got their FD-SOI ARM chip now up to 3.0 GHz:

http://www.stericsson.com/press_releases/L8580_demo.jsp

No big news, they still don't say anything about the power-draw at that speed, but scaling seems good. 3 GHz is not that bad for a 8-11 stage pipeline ;-)

Maybe start another thread. The usual contingent destroyed this one.

 

[SocketF]

Maybe start another thread. The usual contingent destroyed this one.

Good idea, but who guarantees that it wont end in the same way like here? Doesn't matter much imo.

 

[NostaSeronx]

http://www.eetimes.com/document.asp?doc_id=1263253

BRUSSELS, Belgium – A three-year project with a budget of 360 million euro (about $465 million) has been set up in Europe to support the industrialization of the fully depleted silicon-on-insulator (FDSOI) manufacturing process.

The project, called Places2Be, is led by FDSOI pioneer STMicroelectronics NV and will support pilot lines to run process at ST's wafer fab at Crolles, France and at Globalfoundries' Fab 1 in Dresden, Germany.
...
The aim of the Places2Be project, the largest yet undertaken by ENIAC, is to support pilot production of FDSOI chips at 28-nm and of a second source that will enable volume production of leading-edge process technology in Europe. The money will be used to help create a European design and manufacturing ecosystem around FDSOI and to support the development of 14-nm and 10-nm follow-on nodes, ST said.
...
ST claims that FDSOI is faster, cooler and simpler technology but, for now, major chip manufacturers Intel, TSMC and Samsung are not persuaded. ST is already operating its R&D line at Crolles and the first FDSOI system chips are expected to be used in consumer electronics, high-performance computing and networking.

For reference of the Bold:

http://www.eetimes.com/document.asp?doc_id=1263309
^-- XDR2 in DDR4 form factors, please.