EETimes: ST plans for Dresden FDSOI production

[AtenRa]

How do you take a niche product like the 3820 that exists only because of the huge cache (faster than AMD's for that matter) and then reaches the brilliant conclusion that Bulldozer is a very efficient architecture? And this after you artfully cherry picking the scenario, if not why else would you mention multi-threaded workload?

This is raw intellectual dishonesty at work. Go find someone else to troll, not me or my posts.

Ed: And TTM has EVERYTHING to do with this. You have to compare IVB, not SNB with Bulldozer/PD chips. BD main competitor isn't a niche product like the 8320.

Your own words,

Regardless on whether you are fond of AMD or not, everybody here can agree that the Bulldozer architecture is very inefficient from performance/area and performance/watt POV.

YOU and only YOU specifically said that the BD Architecture is inefficient, not the product (FX8350) .

As for why compare it against the Core i7 3820 ??? because they have the same characteristics. Same node process, big L2 and L3 caches, HighEnd platforms, made for Multithreaded applications (8 Threads each) etc etc.

You may not like it but the Core i7 3820 is the only Intel CPU you can DIRECTLY compare the FX8350.

 

[ThePeasant]

2: In most MT applications like the x264, PovRay, 7zip, AES and more, the FX8350 is faster than the Core i7 3820. The FX8350 uses more power but it finish the job quicker, that makes them almost equal in power usage. The FX will be faster using a little more power while the Core i7 3820 will be slower consuming less power.

Show me where the 8350 outperforms the i7-3820 enough to negate its higher power.

CMT doesn't reduces the IPC, by your logic HT reduces the IPC in Intel CPUs. CMT or HT increase the PERFORMANCE/throughput of the CPU.

The premise of CMT was to duplicate the resources that would have caused excessive contention and share the remaining resources as much as possible to reduce area and power consumption. More importantly, those resources would be partitioned. This means for a given amount of resources in a module, a CMT implementation would provide access to less resources per thread when compared to a SMT implementation. HT reduces IPC per thread when there are more than one threads executing on a core, with CMT each thread never has access to all the execution/OoO resources in the module.

 

[ThePeasant]

The point of the bigger decoder is to be able to issue more instructions per clock for a single core, how this isn't aimed at improve the performance of a single core?

They aren't making the decoder larger as far as I know, they are putting two independent decoders in each module. So the threads wont have to share decode bandwidth.

 

[Piroko]

Bulldozer might still carry compromises because AMDs original plan was to produce it at 45nm, wasn't it? Efficiency per die area will probably be less important now compared to efficiency per thread and Watt.

 

[MisterMac]

I apologize for belittling you, it was childish of me to engage in a 'tit for tat'. I guess my ego deserves what it got.


Aside from that, the numbers have better sources than I thought, as Atenra points out. If AMD winds up being accurate in their estimates, SR on bulk should be 30% faster than BD/PD (the slides are not clear about which is the base). If SMT winds up being accurate on the estimates for the transition to FD-SOI, then there is at least another 30% possible performance boost. So let's just say that 1.3*1.3 is a good ballpark numer. That's an ~70% boost, in an ideal world. But I admit that it isn't an ideal world (especially given what mrmt posted this morning on AMD's credit rating). AMD is dead to me for now; until they show reason why they should get my attention. They have no product that interests me, only my intellectual curiosity about computer architecture held my interest till now.

I'm sorry.

AtenRa is a AMD FANBOI.
Allbeit not as much as the 1 post trolls or Piesquared - but he refuses to see argue on one ground at a time.

If you go into perf\watt - he starts on perf\price.
etc etc etc.

AMD has not stated those outlandish wild claims - and i don't care if a increased budget in certain areas of the BD Design are getting fixed.

It's unheard of to increase execution perf. per core this much.


It's not like AMD went out and said "Heeeeey - we' can expect this much".
It's us amateurs own logical deduction of the leaks we get - information which at best is sketchy.


Notice how Haswell - a favoured amongst the intel fanbois - is toutered as the best thing since sliced bread.
Yet Intels own statements would aim at a 10 double digit (low probably) increase in IPC.

And this is with certain proven massive changes in the core logical circuits execution design - (Not really counting AVX2, since it's adoption based and i'm skeptic).
And what's the number most are expecting? 10-15% for non new & legacy ISA workloads.

Yet you want AMD to triple or quadruple that ammount?
Come on man - come on.

All the numbers also prove that - while in some cases a AMD APU setup would actually make great sense - most buyers just don't agree.

And that's cause you can't change a market's buying paradigm overnight.
If you do remotely game - anyone in the world knows you need a GPU.
That mindset is killing AMDs brave 1 chip solution for the desktop market tactic - regardless if it's the future or not.


If you somehow don't game - well then intel 9 out of 10 is probably a better choice.

 

[MisterMac]

Also i would like to comment mrmt and peasant for a very interesting discussion.

thumbs up guys

 

[AtenRa]

Show me where the 8350 outperforms the i7-3820 enough to negate its higher power.

This is the best i could find. Although the test run taken is a small amount of time, it clearly shows the FX8350 finishing the test faster than Core i7 3820. The power consumption needed to finish the benchmark will be very close between the two Systems.

Also from AT review, the FX3850 is faster in x264 5.0.5 (second pass) than Core i7 3770K witch is faster than Core i7 3820.

Core i7 3770K vs Core i7 3820
http://www.anandtech.com/bench/Product/551?vs=523

Dont forget that Core i7 3820(SB-E) AND Bulldozer/PileDriver are designed for Server/Workstations first and HighEnd Desktops secondly.

The premise of CMT was to duplicate the resources that would have caused excessive contention and share the remaining resources as much as possible to reduce area and power consumption. More importantly, those resources would be partitioned. This means for a given amount of resources in a module, a CMT implementation would provide access to less resources per thread when compared to a SMT implementation. HT reduces IPC per thread when there are more than one threads executing on a core, with CMT each thread never has access to all the execution/OoO resources in the module.

Just to clear a few things,

IPC is measured in SINGLE THREAD, if we have two or more threads we measure Performance/Throughput. IPC doesnt go down, it just Multithreaded efficiency and scaling that doesnt reach 100%.

CMT(Cluster MuthiThread)
One Core(single thread) = IPC is 100% and 100% performance of a single Core.
Two threads = IPC is still 100% for single core(single thread) and you get 80% of performance of two individual cores.

Total Performance/scaling for two threads = ~180%

SMT(HT) - Simultaneous MultiThreading or HyperThreading
One Core(single thread) = IPC is 100% and 100% performance of a single Core.
Two Threads = IPC is still 100% for single core(single Thread) and you get an extra 25-30% of performance of a second thread.

Total Performance/scaling for two threads = ~130%

CMP(Chip Multi Processor)
One Core(single thread) = IPC is 100% and 100% performance of a single Core.
Two Threads = IPC is still 100% for single core(single Thread) and you get 99% of performance of two individual cores

Total Performance/scaling for two threads = ~199%

 

[mrmt]

Show me where the 8350 outperforms the i7-3820 enough to negate its higher power.

Don't go there, it's a flame bait. If you relinquish 2MB of L3 cache you can have all the performance of a 3820 with the 2600K in a *much* more efficient package.

3820 is Intel strategy to get rid of defective SNB-EP 4C, a server SKU with a faster (and more cumbersome) interconnect interface. it's a niche processor, not a mainstream product. Our troll knows that because this was probably pointed to him here or somewhere else, but he *must* prove that AMD is efficient whatever the cost and will bend whatever numbers he needs.

 

[AtenRa]

If you go into perf\watt - he starts on perf\price.
etc etc etc.

I have specifically addressed his claims about performance/size and performance/watt by comparing equal designs, the Quad core 8 Threads SB-E and Quad Module 8 Threads PileDriver that are designed for Server and Workstations.

 

[AtenRa]

3820 is Intel strategy to get rid of defective SNB-EP 4C, a server SKU with a faster (and more cumbersome) interconnect interface.

Quad Core SB-E is a different die than Okta(8) Core SB-E.

http://www.anandtech.com/show/5276/intel-core-i7-3820-review-285-quadcore-sandy-bridge-e

The Core i7 3820 is the first (and only) quad-core Sandy Bridge E CPU. It's so new that the chip isn't even available for sale nor will it be until early 2012. Unlike the relationship between the 3960X and 3930K, the 3820 is an entirely new die.

So, in order to compare the PileDriver die that has 16MB(8+8) of L2 and L3 Cache is only against the Quad Core SB-E that has 12MB(2+10) of L2 and L3 Cache, almost same amount of transistors, almost same die size and are both at 32nm.

 

[Gideon]

Quad Core SB-E is a different die than Okta(8) Core SB-E.

Whoa, I'm impressed you managed to find such single example. However you are still awfully distorting the reality here.

1) FX-8350 might get similar performance in heavily threaded bechmarks, but it definitily isn't flat out faster than 3820 as you claim:
http://www.anandtech.com/bench/Product/697?vs=523

2) FX-8350 consumes 70W more power, being only 9% faster in x264 2-nd pass. That's 90% of the TDP of a 3770K (that you so niftily used in your comparison), including the GPU!

3) Also do not forget that 3820 has 4 memory channels and 51.2 GB/s peak memory bandwith and therefore an appropriate memory controller. I don't know how much it adds to TDP, but it surely takes up a considerable portion of that "similar" die-size, compared to Bulldozer. Crop half of the cores and cache from the following image and you'll get the picture:

Compared to Bulldozer:

I sincerely hope AMDs managent is not resorting to similar comparisons, just to keep themselves in a delusion of a very compeditive architecture on perf/W perf/transistor basis.
The first step to any kind of progress is admiting a problem (even if it is only precieved, doesn't matter), not making generating excuses.

 

[Gideon]

Ok, I accidentally used FX-8150 for power consumption comparison. FX-8350 is about 4W more economical in a similar system, therefore it would economicaly sip only 66W more. That's still 85% of the entire 3770k TDP. Good look saving that, while spitting out ~9% more frames per sec (compared to the original 3820).

 

[Idontcare]

Dont forget that Core i7 3820(SB-E) AND Bulldozer/PileDriver are designed for Server/Workstations first and HighEnd Desktops secondly.

Unfortunately, IMO, it is very easy for this point to get lost in the details of absolute performance, cost, and power.

Being a non-APU, no iGPU, design targeting the server and HPC markets (for both Intel and AMD product lines), the parallels are easily identifiable.

AM3+ is to AMD what 1S LGA2011 is to Intel.

FM1/2 is to AMD what LGA1156 is to Intel.

Of course the product segmentation doesn't break out identically and cleanly for either sides in parallel, and perhaps that is what causes some of the muddying of the waters.

What really makes the water muddy though is pricing and performance, regardless the product's intended segmentation.

Meaning even though my FX-8350 is not an APU, and it is intended to go into a system geared towards serving the same compute needs that are served by someone owning an i7-3930K (non-iGPU SKU), the price and performance of the FX-8350 necessitates a comparison to a product (2500K/3570K) which was created to serve an entirely different market segment (those are iGPU SKUs).

If it weren't for the lacking performance, which then dictates price, the FX Piledriver (and bulldozer predecessor) would have been compared with Intel's 32nm LGA2011 non-iGPU products the same as the non-APU Opteron SKU's (derived from the same chips, just validated differently) are rightly compared to 32nm SB XEON chips. (there are no 22nm comparisons to be made for XEON or LGA2011 enthusiast class SKUs)

Likewise with Llano and Trinity. These products were created with a specific market segment in mind, intending to compete against a specific class of products coming from Intel (their iGPU products).

And that plan would have come off marvelously if it weren't for the lackluster performance of Llano's cores, as well as that of Trinity's. Performance was poor such that price had to be lowered, which then naturally led to comparisons between products that were never intended to be compared because they weren't engineered with the same target audience in mind.

This isn't to say that reviewers and consumers are doing anything wrong. We are right to analyze performance solely through the eyes of cost. But we are going about our analyses wrong if the goal of the analyses are to compare microarchitectural details and engineering trade-offs on the basis of the forced product comparisons that are wrought at the hands of market forces.

Think of it like cars. I have two family vehicles, a prius and a minivan. Both have four wheels, a steering wheel, and a windshield. Neither vehicle was designed and engineered to serve the same demographic as the other, they were designed to serve two very different demographics. But they cost the same...so they can be compared if price-comparison alone was our sole metric for deciding when two products ought to be considered to be competitors.

My prius was never intended to be able to haul 7 people around, my minivan was intended to do that. My minivan was never intended to get 50mpg, but my Prius was. Both may cost $25k, both may be available for purchase from the same reseller, both may have comparable specs when it comes to number of wheels and the fuel they use, but that doesn't mean they were ever intended to actually compete with each other, they were intended to serve two different needs.

Which isn't to say that I don't try and use the Prius as a people-hauler instead of the van (5 adults will fit, as uncomfortable as it may be), and it doesn't mean I don't try and convince my minivan to sip gas (drive slowly, use neutral coasting when possible, etc).

 

[ThePeasant]

This is the best i could find. Although the test run taken is a small amount of time, it clearly shows the FX8350 finishing the test faster than Core i7 3820. The power consumption needed to finish the benchmark will be very close between the two Systems

The same article shows the task energy for that benchmark, even though it doesn't account for idle a rough estimate from the graph shows that the 8350 uses a little over 50% more power while finishing the benchmark ~17% faster.

Just to clear a few things,

IPC is measured in SINGLE THREAD, if we have two or more threads we measure Performance/Throughput. IPC doesnt go down, it just Multithreaded efficiency and scaling that doesnt reach 100%.

Firstly, IPC is typically measured for a single thread. It isn't a property exclusive to individual threads of execution and there is nothing stopping anyone from measuring the total IPC of 4 threads or 100. Secondly, I was using it the way it is typically used.

If two cores/modules with only two threads executing outperforms one module/core with 2 threads the average IPC of the threads must decrease. However that isn't what I was talking about in that quote.

For theory sake, consider two 'cores' both with sufficient OoO/scheduling/decode/IO/cache/branch prediction resources such that the IPC of each thread is solely dictated by the maximum IPC of that thread (within some delta) or the width of the core/cluster. Both 'cores' have the same number of execution ports, are at the same frequency, and can execute a maximum of 2 threads but one implements CMT while the other implements SMT. When both 'cores' have two threads executing the overall performance should be exactly the same. When executing only a single thread however, the core which implements CMT will always perform either equal to or less that the one with SMT because CMT partitions execution resources between clusters.

This is obviously contrived and in practice there are many limitations and variables that would complicate a comparison but it highlights the theoretical tradeoffs CMT makes vs SMT. Simply put, it trades the higher potential single-threaded IPC of a wide SMT core for the complexity, area and power advantage of two or more narrower clusters while maintaining overall throughput.

Unfortunately, IMO, it is very easy for this point to get lost in the details of absolute performance, cost, and power...

A comparison with server/workstation CPUs is inherent in relegating the 8350 to being compared with mainstream CPUs and interestingly I don't see anyone posting server benchmark comparisons.

 

[Ajay]

I'm sorry.

AtenRa is a AMD FANBOI.
Allbeit not as much as the 1 post trolls or Piesquared - but he refuses to see argue on one ground at a time.

If you go into perf\watt - he starts on perf\price.
etc etc etc.

AMD has not stated those outlandish wild claims - and i don't care if a increased budget in certain areas of the BD Design are getting fixed.

It's unheard of to increase execution perf. per core this much.


It's not like AMD went out and said "Heeeeey - we' can expect this much".
It's us amateurs own logical deduction of the leaks we get - information which at best is sketchy.


Notice how Haswell - a favoured amongst the intel fanbois - is toutered as the best thing since sliced bread.
Yet Intels own statements would aim at a 10 double digit (low probably) increase in IPC.

And this is with certain proven massive changes in the core logical circuits execution design - (Not really counting AVX2, since it's adoption based and i'm skeptic).
And what's the number most are expecting? 10-15% for non new & legacy ISA workloads.

Yet you want AMD to triple or quadruple that ammount?
Come on man - come on.

All I was really saying, is that I didn't pull the numbers out of my $ss. I forot that the numbers I had we're from AMD. Now maybe AMD and SMT are getting those numbers from a place where the sun doesn't shine (though at least SMT's numbers are based on advanced prototypes).

The only reasons for considering AMD's numbers to be real is that BD was a very weak implementation of CMT to begin with; and SR is coming out at least six months after it was supposed to allowing some additional tweaks to be added (at least that's the story being told). So, from an architectural standpoint, it is possible. This would be no different than Intel improving HT from a +25% max performance gain on P4 based Xeons with HT, to the +50% max gains I've seen on my Nehalem - except AMD has been falling further an further behind since 2006.

Will any of this happen? Id say no, as I have no faith in AMD's current management. That and GF is just screwing with AMD to squeeze every dollar out of them before they fail (which is the converse of what most foundries want to do, since they depend on repeat business).

As for my preferred platform choice, just check out my sig. I do actually have one older AMD rig, but it's sole purpose is to run two GTX 260s for F@H. And I have another Intel Q6600 running (an overpowered) server - unfortunately it only has one PCIe slot.

 

[mrmt]

All I was really saying, is that I didn't pull the numbers out of my $ss. I forot that the numbers I had we're from AMD. Now maybe AMD and SMT are getting those numbers from a place where the sun doesn't shine (though at least SMT's numbers are based on advanced prototypes).

There are a lot of wild assumptions flying around here.

AMD said that Steamroller would improve performance up to 30% in some scenarios, but the usual AMD marketing tax should be applied here. They aren't delivering what they are promising, a marketing drone of them came here lying straight face to the community, AMD statements should be taken with a lot of salt.

The other part of your improvements come from FD-SOI. First AMD never stated they would go FD-SOI, they said they would go to standard 28nm technology and as of now this technology is bulk. There is no 28nm FD-SOI HVM, STM and GLF are still negotiating the deal to allow the process. When the two reache an agreement, AMD will have to port a big and acknowledged complex design to this process and both the design and the node will have to have to perform as advertised and have good yields.

What I see here is two *very* long shots. Too long to be deemed reasonable expectations, but much more a wish/hope that AMD succeeds.

 

[ShintaiDK]

AMD tends to talk performance/watt.

Not to mention the 30% number floating is pulled out of context. But yet again people ran with half the information and started a hype. Only to fool themselves and then blame the company when the impossible expectations couldnt be delivered. Unless they are lucky enough that the companys marketing division jumps into it. Then its an all round fail.

 

[MisterMac]

All I was really saying, is that I didn't pull the numbers out of my $ss. I forot that the numbers I had we're from AMD. Now maybe AMD and SMT are getting those numbers from a place where the sun doesn't shine (though at least SMT's numbers are based on advanced prototypes).

The only reasons for considering AMD's numbers to be real is that BD was a very weak implementation of CMT to begin with; and SR is coming out at least six months after it was supposed to allowing some additional tweaks to be added (at least that's the story being told). So, from an architectural standpoint, it is possible. This would be no different than Intel improving HT from a +25% max performance gain on P4 based Xeons with HT, to the +50% max gains I've seen on my Nehalem - except AMD has been falling further an further behind since 2006.

Will any of this happen? Id say no, as I have no faith in AMD's current management. That and GF is just screwing with AMD to squeeze every dollar out of them before they fail (which is the converse of what most foundries want to do, since they depend on repeat business).

As for my preferred platform choice, just check out my sig. I do actually have one older AMD rig, but it's sole purpose is to run two GTX 260s for F@H. And I have another Intel Q6600 running (an overpowered) server - unfortunately it only has one PCIe slot.

There we go again.... Nehalem was not a 50% IPC increase give or take.
Especially since test back then had threaded apps vs non threaded apps totally messing the overall benchmark impressions from everyone.




You receive a ton of data - and immediately assume you know how to validate and measure each datapoint.

Stop that -_-

 

[MisterMac]

AMD tends to talk performance/watt.

Not to mention the 30% number floating is pulled out of context. But yet again people ran with half the information and started a hype. Only to fool themselves and then blame the company when the impossible expectations couldnt be delivered. Unless they are lucky enough that the companys marketing division jumps into it. Then its an all round fail.

That's another thing.

SR wiill most likely deliver 30% or more Perf per Watt.
Because PD\BD have the bar so bloody low as possible.

And then piesquared\atenra is gonna be like:
"I TOLD U SOOOOOOO" - after which they proceed to claim victory.

I would expect 7-8% raw IPC increase in SR from PD.
And somehow i think i'm being generous.

 

[Ajay]

There we go again.... Nehalem was not a 50% IPC increase give or take.
Especially since test back then had threaded apps vs non threaded apps totally messing the overall benchmark impressions from everyone.




You receive a ton of data - and immediately assume you know how to validate and measure each datapoint.

Stop that -_-

You get some reading glasses! What I said is that the delta in performance gained from running two threads (implied) from HT increased significantly from P4 Xeons to Nehalem. And I ran the tests, on F@H, IIRC, which is highly optimized parallel code. Dammit man, go piss on somebody else's shoes - O.K.? Who the hell are you to get mad at me when you misread my post - take a pill or something! Just because I'm on the internet, doesn't mean I'm not a person.

 

[erunion]

I think AMD made similar claims about total multithreaded performance. (AMD did emphasize performance per watt when Vishera launched though)

Interestingly, before Vishera launched people built their claims that Vishera would improve IPC by 10-15% on this slide. Then they added things like clock bumps from RCM to declare Vishera would offer 20-25% more performance. Basically what we've seen in this thread.
(Vishera did end up hitting the up to 10% total performance mark, but no better)

The 30% number that is floating around for Steamroller doesn't seem to have anything to do with 30% IPC. Rather its relates to "Ops per Cycle" for the fetch/decode units.
(I'm not an EE so feel free to clue me on what exactly that means, anyone)

 

[Ajay]

AMD tends to talk performance/watt.

Not to mention the 30% number floating is pulled out of context. But yet again people ran with half the information and started a hype. Only to fool themselves and then blame the company when the impossible expectations couldnt be delivered. Unless they are lucky enough that the companys marketing division jumps into it. Then its an all round fail.

The slides AtenRa posted where marked up after the above perf/watt graph from AMD. And it does say 30% outright (not per watt):

<2> Based on AMD's internal simulations results of average workloads of simulated performance on a number of tests, including those digital media, productivity and gaming applications

I bolded 'simulations/simulated' because what they are really saying is that this is an estimate of an estimate, also known as a blue sky guess in most industries

 

[Ajay]

There are a lot of wild assumptions flying around here.

AMD said that Steamroller would improve performance up to 30% in some scenarios, but the usual AMD marketing tax should be applied here. They aren't delivering what they are promising, a marketing drone of them came here lying straight face to the community, AMD statements should be taken with a lot of salt.

The other part of your improvements come from FD-SOI. First AMD never stated they would go FD-SOI, they said they would go to standard 28nm technology and as of now this technology is bulk. There is no 28nm FD-SOI HVM, STM and GLF are still negotiating the deal to allow the process. When the two reache an agreement, AMD will have to port a big and acknowledged complex design to this process and both the design and the node will have to have to perform as advertised and have good yields.

What I see here is two *very* long shots. Too long to be deemed reasonable expectations, but much more a wish/hope that AMD succeeds.

Exactly, and that's why I just have no confidence in AMD/GF. We really don't have any idea what they can/will do...

 

[itsmydamnation]

i think what people here are forgetting is that the 30% increase instruction throughput is going to remove a lot of the CMT penality, so in single thread you will see some benifit in multithread you will see a lot more. CMT penality is generally around 30%. The other core changes are what will drive single thread performance.

also piledriver delivers way more then 10% perf improvement over BD

http://www.anandtech.com/bench/Product/697?vs=434

it delivers a consistant 10% IPC and consistant 10% clock which looks like 20% to me.

eidt: remember 8150 and 8350 have same single thread clock when looking at single thread results in that chart

 

[erunion]

Thanks. I misspoke.

Vishera's max is 15%. 10% is more of the average. 7% higher clicks, and up to 7% IPC.