Electronics question: Odd use of AND Gate?

[Jeff7]

Maybe too general for General Hardware, not technical enough for Highly Technical. So here it is.

An eval board schematic (PDF, pg13) I'm looking at for the ADE7753 shows some AND gates inserted into some data lines - except each gate has both of its input pins tied together. They're tied right together on the PCB layout as well, without any kind of crazy routing paths.

Are they acting as some kind of noise filter, or an intentional source of propagation delay, or what? The only mention of them in the text is in the Bill of Materials.

 

[Matthiasa]

Could be acting as a buffer.

 

[dighn]

those are buffers. they are useful if you need to drive a heavier load or in this case when interfacing circuits that may not be 100% compatible when it comes to current sourcing and sinking capabilities. doesn't look like delay comes into play here.

 

[rockyct]

I think it's a delay like you say, but really not that sure.

edit: nm, guy above sounds right.

 

[So]

Agreed. Buffer.

 

[PottedMeat]

yeah, buffers. the ade7753 logic outputs can only sink 0.8ma ( one 7ma )/source 5ma, the 74HC08 will source/sink 25mA. they just want to drive the optocoupler diodes a little harder than the 7753 alone.

 

[bruceb]

Actually, it is working as a Logic Inverter ... old trick for designers so as not to need another chip just to change from a 1 to 0 or vice versa. All you need to do is know how the logic tables work. For an AND Gate, both Inputs must be a "1" for the Ouput to be a "1" ... If either input is a "0" output will be a "0" .. So when both inputs are tied, whatever comes in, comes out the opposite (and this will work with just about any type of gate OR / NAND / AND / NOR )

 

[her209]

Actually, it is working as a Logic Inverter ... old trick for designers so as not to need another chip just to change from a 1 to 0 or vice versa. All you need to do is know how the logic tables work. For an AND Gate, both Inputs must be a "1" for the Ouput to be a "1" ... If either input is a "0" output will be a "0" .. So when both inputs are tied, whatever comes in, comes out the opposite (and this will work with just about any type of gate OR / NAND / AND / NOR )

I think you need to look at the logic tables for an AND gate again.

 

[bruceb]

No, you do. I know how an AND Gate works

http://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Comb/gates.html

http://en.wikipedia.org/wiki/Logic_gate

 

[TecHNooB]

No, you do. I know how an AND Gate works

http://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Comb/gates.html

http://en.wikipedia.org/wiki/Logic_gate

i think you meant NAND gate.

 

[PottedMeat]

i think you meant NAND gate.

yeah, that works for NAND gates.

 

[bruceb]

It works for any gate ... OR .. NOR .. AND .. NAND
except XOR / XNOR
See the link above ... The only change internally is
wether the gate has a builtin inverter on the output.
An OR or AND gate outputs a "1"
An NOR or NAND gate outputs a "0"
In either case if the Inputs are tied together, it will function as an Inverter

 

[PottedMeat]

uh all the links you've posted say

Buffer:
0 AND 0 = 0
1 AND 1 = 1

Inverter:
0 NAND 0 = 1
1 NAND 1 = 0

 

[her209]

It works for any gate ... OR .. NOR .. AND .. NAND
except XOR / XNOR
See the link above ... The only change internally is
wether the gate has a builtin inverter on the output.
An OR or AND gate outputs a "1"
An NOR or NAND gate outputs a "0"
In either case if the Inputs are tied together, it will function as an Inverter

Methinks you're confused. The inverting is done by the inverter, i.e., the NOT gate. Inverting is not done simply because both inputs are tied together and the truth tables clearly show that.

 

[bruceb]

Wrong. When the inputs are tied together, the output is ALWAYS opposite of the Input. What has been done is create what engineers call a NOT Gate

Better explanation here, since you do not seem to understand.

http://www.allaboutcircuits.com/vol_4/chpt_3/9.html

Start at Page 01 and read thru it. If you don't believe, test it yourself with a breadboard and a logic probe.

http://www.electronics-tutorials.ws/logic/logic_1.html

http://www.electronics-tutorials.ws/logic/logic_5.html

 

[Born2bwire]

Wrong. When the inputs are tied together, the output is ALWAYS opposite of the Input. What has been done is create what engineers call a NOT Gate

Better explanation here, since you do not seem to understand.

http://www.allaboutcircuits.com/vol_4/chpt_3/9.html

Start at Page 01 and read thru it. If you don't believe, test it yourself with a breadboard and a logic probe.

http://www.electronics-tutorials.ws/logic/logic_1.html

http://www.electronics-tutorials.ws/logic/logic_5.html

That would only be true if the logic gate is a NAND or a NOR. Tying the inputs together on an AND or OR gate makes it act like a buffer.

You should note that the circle on the output pin of a gate indicates that it is of the NOT output type. That is, an AND gate with a circle on the output is a NAND gate. It is the same as feeding the output of an AND gate into an inverter. Since tying the inputs together makes an AND/OR a buffer, placing an inverter in line with the output changes it from a buffer to an inverter.

We often work with NAND and NOR gates because they use fewer transistors than an AND/OR gate. In addition, these gates are also universal as a combination of themselves can be used to reproduce the NOT, AND or OR operators. AND and OR cannot do this as they cannot reproduce a NOT operator.

 

[Jeff7]

Ok, makes sense. I'd seen buffers before, at least in schematic form; I'd never seen an AND gate used in this fashion before. (And the optocouplers I'm accustomed to using are rated for 5mA on the LED side anyway.)
It's probably good to have the gates in there though.

Wrong. When the inputs are tied together, the output is ALWAYS opposite of the Input. What has been done is create what engineers call a NOT Gate

Um...if the incoming signal is logic 1, and it gets split to both inputs of an AND gate, you'll get logic 1 out.
If the incoming signal is logic 0, and it gets split, you'll get logic 0 out.
Doesn't sound like inversion to me.

Better explanation here, since you do not seem to understand.

I guess count me in too.
Input of 1 yields output of 1.
Input of 0 yields output of 0.

Again, I'm not seeing the inversion.

 

[Adul]

Wrong. When the inputs are tied together, the output is ALWAYS opposite of the Input. What has been done is create what engineers call a NOT Gate

Better explanation here, since you do not seem to understand.

http://www.allaboutcircuits.com/vol_4/chpt_3/9.html

Start at Page 01 and read thru it. If you don't believe, test it yourself with a breadboard and a logic probe.

http://www.electronics-tutorials.ws/logic/logic_1.html

http://www.electronics-tutorials.ws/logic/logic_5.html

Maybe you need to rethink this, it isnt that difficult.

Whether or not you tie the pins together, if you provide a 1 on the inputs you get a 1 on the output. The only inversion is done is with a nand and nor gate.

 

[Number1]

Wrong. When the inputs are tied together, the output is ALWAYS opposite of the Input. What has been done is create what engineers call a NOT Gate

Better explanation here, since you do not seem to understand.

http://www.allaboutcircuits.com/vol_4/chpt_3/9.html

Start at Page 01 and read thru it. If you don't believe, test it yourself with a breadboard and a logic probe.

http://www.electronics-tutorials.ws/logic/logic_1.html

http://www.electronics-tutorials.ws/logic/logic_5.html

There is something you're not getting and you are WRONG. An and gate does not invert the signal.

 

[fail]

..

 

[yh125d]

Self-ownage of the year already?

Wrong. When the inputs are tied together, the output is ALWAYS opposite of the Input.

*WHOOOOOOOOOOOOSH*

 

[ObscureCaucasian]

I think he may be confused by the circle on the NANDs that signify the inverter.

 

[arcenite]

Bruce, I really want to be wrong so I can learn something...but

0 AND 0 = 0
1 AND 1 = 1

 

[Jeff7]

http://xkcd.com/386/

It has come to pass.

 

[DanFungus]

Come on guys, this is very logical:

The circuit just knows if the lines are tied together