Let's see:
Problems with Quad FX:
-Higher price
-Much lower performance
-Much higher power consumption
-Absolutely no upgrade route
I'd say those are pretty big problems.
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2 Socket 2 Dual Cores
vs
1 Socket 1 Quad Core
I don't see the problem
o/t
Here is a good article from the past. Where AMD went with a dual FX cpu platform to compete with Intel's new (at the time) quad core.
That was interesting at the least.
Maximum PC - Feb 2007
Let's see:
Problems with Quad FX:
-Higher price
-Much lower performance
-Much higher power consumption
-Absolutely no upgrade route
I'd say those are pretty big problems.
2 Socket 2 Dual Cores
vs
1 Socket 1 Quad Core
I don't see the problem
The problem was an unbelievably expensive platform that performed worse in almost everything compared to its competition in Kentsfield. It also drew almost 500w, about 200W more than the Q6xxx setup.
http://www.anandtech.com/show/2125/14
It was also abandoned, and the promises about being able to run two quad-cores in the setup were squashed permanently.
"AMD is guaranteeing a bit of an upgrade path to early adopters of Quad FX by promising that these motherboards will work with AMD's native quad-core CPUs when they are available next year, meaning you'll get support for eight cores in the same platform in less than a year."
Unfortunately AMD dropped plans for the dual Quad support, which would have been interesting not with the first-gen Phenom, but dual PhII AM2+ would have been interesting.
I know I read up on it again it is one of those niche AMD Ultra-high-end parts where only Enthusiasts buy such parts
At that time I was sporting on a $2000 Pentium 4 machine...Going back to Intel I guess since Bulldozer is an utter failure
Hopefully something can be salvaged and we see a future run of BD with some of the major problems fixed. That is unless the very nature of the shared module tech is just an inherent failure.
More or Less the problem is the lack of execution resources rather than the design of a shared module what I think
from the leaked cache bandwidth figures (all leaks show the same AFAIK) high performance code will be not even able to fully use the available FPU resources, there is no point to double them
whatever your compute capabilities, at the end of the day you have to store the results of your computations and when you have write-through L1 caches and a shared L2 cache, L2 store bandwidth is clearly the bottleneck if not dimensioned well
You are right....but things just don't add up I am so confused now
for example(FX-8150/FX-8120 should beat 1100T in mostly every multithreaded test)
What do you think about fp load buffer limit? It's supposedly 2x128bit for load and 1x128bit for stores. What happens if they limit this buffer so it can only serve 1x128bit load and store? This would cut the power of whole flexfp by roughly 1.7x. Since the whole flexfp is working by being shared between 2 cores every other cycle,each core would get just 1/4 of the flexfp for itself effectively with this fp load buffer limitation (according to SOM ,only single thread from one of the cores can execute on flexfp,but threads can switch every cycle-this effectively means that each core gets 1 fmac per cycle in well threaded fp code).from the leaked cache bandwidth figures (all leaks show the same AFAIK) high performance code will be not even able to fully use the available FPU resources, there is no point to double them
whatever your compute capabilities, at the end of the day you have to store the results of your computations and when you have write-through L1 caches and a shared L2 cache, L2 store bandwidth is clearly the bottleneck if not dimensioned well
What do you think about fp load buffer limit? It's supposedly 2x128bit for load and 1x128bit for stores. What happens if they limit this buffer so it can only serve 1x128bit load and store?
The problem was an unbelievably expensive platform that performed worse in almost everything compared to its competition in Kentsfield. It also drew almost 500w, about 200W more than the Q6xxx setup.
http://www.anandtech.com/show/2125/14
It was also abandoned, and the promises about being able to run two quad-cores in the setup were squashed permanently.
"AMD is guaranteeing a bit of an upgrade path to early adopters of Quad FX by promising that these motherboards will work with AMD's native quad-core CPUs when they are available next year, meaning you'll get support for eight cores in the same platform in less than a year."
Unfortunately AMD dropped plans for the dual Quad support, which would have been interesting not with the first-gen Phenom, but dual PhII AM2+ would have been interesting.
ASUS later added support for dual quad core Barcelona Opteron's to the L1N64-SLI WS/B board. Unfortunately, you are correct, there were never any consumer quad core Socket F 1207 processors for those with the non-workstation board. Those users had to buy the BIOS PLC chip for the WS/B motherboard if they wanted any upgrade path.
My only concern is that the Bulldozer FX chip and launch goes worse than the quadfather did!
Is that real? Did AMD really come up with "the quadfather"?
Is that real? Did AMD really come up with "the quadfather"?