Meanwhile, we are already starting to see fans gather themselves near AMD headquarters in Sunnyvale, California in preparation for the historic launch:
Meanwhile..
Meanwhile, we are already starting to see fans gather themselves near AMD headquarters in Sunnyvale, California in preparation for the historic launch:
How can you "simulate" an FX 6110??
was that even english??
AMD will showcase the Power of More Cores as a platinum sponsor of VMworld 2011 in Las Vegas, August 29th through September 1st
they took a ES B1 stepping FX-8130P and locked down 2 cores then oced it to 3.8ghz to simulate a FX 6110.How can you "simulate" an FX 6110??
they took a ES B1 stepping FX-8130P and locked down 2 cores then oced it to 3.8ghz to simulate a FX 6110.
Wasn't the B1 version of Zambesi supposed to have a gazillion problems? So what's the point?
If they wont show a screenshot of AIDA64 results then they are worthless. By now everyone should know the ES scores zero on AIDA64 L2 and L3 write. As long as that is true I consider these parts extremely crippled. And if someone does not post results then they are deliberately contributing FUD.
There are AIDA64 screenshots at the linked source... Scores aren't terribly impressive compared to SB, though. I thought the IMC was getting upgraded?
Of course, this could all just be fantasy...
The above is the exposure of the AMD Bulldozer processor specifications and performance, as these pictures can not be determined based on the performance of bulldozers, bulldozers, so the author based on the specifications with the current Phenom II processors for the performance simulation.
Meanwhile, we are already starting to see fans gather themselves near AMD headquarters in Sunnyvale, California in preparation for the historic launch:
If they wont show a screenshot of AIDA64 results then they are worthless. By now everyone should know the ES scores zero on AIDA64 L2 and L3 write. As long as that is true I consider these parts extremely crippled. And if someone does not post results then they are deliberately contributing FUD.
Considering they seem to simulate the FX6110 with the 1100T I think so yes.
(or that is what their screenshots(cpu-z) and performance numbers indicate.).
Dude Front Loader not a Bulldozer you're not the first person to make this mistake.
Dude, I don't have all day to search the internet for pics of manned toy bulldozers. Why must you people always question everything and be soooooo serious!
thou shalt tirelessly troll RussianSensation, so sayeth the spider
Dude, I don't have all day to search the internet for pics of manned toy bulldozers. Why must you people always question everything and be soooooo serious!
.......BD module may have 20% better IPC than K10.5 core, because of better memory reordering, faster cache hierarchy, wider front end, beefer branch prediction, bigger L2 cache, and faster memory controller and L3 cache. Also, BD module can execute 2 ALU, 2 AGU, 2 intSSE and 2 fpSSE operations per cycle per thread. BD module is 4-issue design versus 3-issue K10.5. Light multithreaded software has lower paralelisation, arround 0.7, and heavy multithreaded code has 0.95 paralelisation. FP intensive code also contain lot of integer code. Cinebench for example has 0.6 IPC for integer and 0.7 IPC for FP on K10 core. FPU is underutilised, because max for FP is 2 packed FP-SSE operations or 2x integer SSE and shuffle on K10 core. With BD module max. is 2 packed FP SSE or FMA + 2 integer SSE or FMA or 1 int SSE + 1 shuffle. Per thread FP IPC can be 0.8, and int IPC can be 0.7. That is 15-20% better per core IPC than K10. With 33% more cores, 15% better average IPC, and 15% higher frequency, overall multithread performance in FP intensive applications can be up to 55-60% better than Thuban. Also if IPC per core is same or little lower, because of shared resources, with higher frequency and more cores in such FP intensive applications performance can rise up to 40%, which is good.