Fudzilla: Bulldozer performance figures are in

[BlueBlazer]

From Anand's twitter account:
So yeah,all those results showing BD ES slower than Bobcat/Llano are useless.

So, how much improvement do you think B2G stepping will bring to the table (compared to the leaked poor results which are "slower than Bobcat/Llano")? :hmm:

Yea, I don't understand how a revision with higher IPC is coming down the pipeline if AMD is already shipping (more expensive, lower clocked) Opterons?

Higher IPC on the newer revision? I don't think so as that would require silicon re-spin, more changes to the die and more debugging(!). The new stepping would be addressing bug fixes which affects performance (as mentioned earlier).

Are they just expecting server customers to accept lower performance? Are there actually two dies for BD (instead of just the one?).

If you noticed the first shipments are for supercomputer vendor Cray. Also if you had followed this thread closely, then you should notice discussions about Bulldozer cache issues and patching (workaround) in Linux. It also happens that Cray runs (its own customized) Linux operating system.

 

[inf64]

I don't think new revision can bring up IPC if the design works as AMD expected. If it doesn't then something is wrong with it and hopefully it can be fixed.

BTW the Linux patch has nothing to do with the latest poor results since it's practically unnoticeable (3% on average). Latest leaks suggest Zambezi can't even match Llano in many workloads,let alone Thuban.

 

[Idontcare]

If the latest leaks are real, not faked like OBR's, then at most they are showing us how immature the platform itself is - including CPU, chipset, and mobo - and this is not at all unexpected as all pre-release platforms have teething issues, that is why they are not released at the time.

I doubt the Sisoft benchmarks are indicative of bulldozer's performance, if it were then Cray would not be interested in replacing existing MagnyCour CPU's with Interlagos CPU's, that would be a step backwards for their customers.

However it does stand to reason that the server platform would be production ready given that is/was the focus of bulldozer all along.

 

[amenx]

Meanwhile SB-E leaks surface...

http://www.xbitlabs.com/news/cpu/di..._Boost_Performance_by_Up_to_65_Estimates.html

 

[inf64]

Meanwhile SB-E leaks surface...

http://www.xbitlabs.com/news/cpu/di..._Boost_Performance_by_Up_to_65_Estimates.html

Re-posted 3 times already and discussed. SB-E is around 3-10% faster than Westmere at the same clock(non-AVX aware desktop workloads).

 

[BlueBlazer]

BTW the Linux patch has nothing to do with the latest poor results since it's practically unnoticeable (3% on average). Latest leaks suggest Zambezi can't even match Llano in many workloads,let alone Thuban.

In Linux, these issues can be easily patched. However, majority of desktop PCs run Micro$oft Windows (whether its XP, Vista, 7, etc). That's the point I've made when I mentioned about unpatched operating systems earlier.

 

[Nemesis 1]

From Anand's twitter account:
So yeah,all those results showing BD ES slower than Bobcat/Llano are useless.

LOL You sure like to spread the peanut butter thick . I can't think back far enough to when the last time was you got anything right.

 

[inf64]

LOL You sure like to spread the peanut butter thick . I can't think back far enough to when the last time was you got anything right.

Who cares what you think? You just go around and troll.You have no real tech knowledge apart from "local hardware expert" title you may carry in your neighborhood.
I can't think back far enough to when the last time was you posted anything relevant at all.

In Linux, these issues can be easily patched. However, majority of desktop PCs run Micro$oft Windows (whether its XP, Vista, 7, etc). That's the point I've made when I mentioned about unpatched operating systems earlier.

Ok ,I now understand what you meant. But these performance issues with Zambezi ES don't look like OS issue to me. Even though windows 7 may not be intelligent enough to schedule threads correctly on Bulldozer (schedule first on single cores in modules and then on "second cores" when thread count goes >4). The issues we are seeing look more like hardware ones rather then software ones. Maybe this is how design really performs and these are the tradeoffs . We will know more soon.

 

[Abwx]

But these performance issues with Zambezi ES don't look like OS issue to me. Even though windows 7 may not be intelligent enough to schedule threads correctly on Bulldozer (schedule first on single cores in modules and then on "second cores" when thread count goes >4). The issues we are seeing look more like hardware ones rather then software ones. Maybe this is how design really performs and these are the tradeoffs . We will know more soon.

Since logical functionnality simulation is not a very heavy task,, we can be confident that the architectural efficency is within their target , but electric simulation of the whole circuit using surely a custom spice simulator , is just way more demanding in ressources.

Simulating electric behaviour during a single clock cycle would
require many months for a quad core , and even with a rendering
farm, it will take quite a lot of time.

So if they have hotspots that occur in some units and force throttling
protection circuitry to be enabled, they have to redisign very tiny parts
of the die and this will be time consuming , inherently...

 

[BlueBlazer]

Ok ,I now understand what you meant. But these performance issues with Zambezi ES don't look like OS issue to me. Even though windows 7 may not be intelligent enough to schedule threads correctly on Bulldozer (schedule first on single cores in modules and then on "second cores" when thread count goes >4). The issues we are seeing look more like hardware ones rather then software ones.

I know Dresdenboy keep insisting that its not an hardware issue, however the example (I posted earlier) of the cache aliasing issue which IMHO is indeed a hardware issue (such that it requires a patch/workaround). The problem is this (3%) is just for Linux, and we do not know how it will affect Windows (and other Windows applications, like benchmark programs). For example, Phenom's TLB bug can cause either insignificant or very significant performance loss depending on application. :hmm:

Maybe this is how design really performs and these are the tradeoffs . We will know more soon.

That's the most interesting part, how will it perform in the final revision. Hopefully they get the bugs ironed out. Again, hopefully no further delays.

 

[exar333]

If the latest leaks are real, not faked like OBR's, then at most they are showing us how immature the platform itself is - including CPU, chipset, and mobo - and this is not at all unexpected as all pre-release platforms have teething issues, that is why they are not released at the time.

I doubt the Sisoft benchmarks are indicative of bulldozer's performance, if it were then Cray would not be interested in replacing existing MagnyCour CPU's with Interlagos CPU's, that would be a step backwards for their customers.

However it does stand to reason that the server platform would be production ready given that is/was the focus of bulldozer all along.

Or it could mean that BD is good for high-core and low-speed applications at this time only. The Interlagos shipped were only 2.2ghz parts IIRC.

So performance per/watt on the low-speed end might be favorable, but perf/watt on higher-clocked parts may be very poor. Could be a design that is scaling poorly.

Either way it goes, all these issues hint at more delays. This has been in the works for a LONG time and the product doensn't smell mature to me.

Edit: By hey, I'm a software guy, so what do I know?

 

[Idontcare]

<- shudders and thinks to self about SUN Niagara...

Or it could mean that BD is good for high-core and low-speed applications at this time only. The Interlagos shipped were only 2.2ghz parts IIRC.

So performance per/watt on the low-speed end might be favorable, but perf/watt on higher-clocked parts may be very poor. Could be a design that is scaling poorly.

Either way it goes, all these issues hint at more delays. This has been in the works for a LONG time and the product doensn't smell mature to me.

Edit: By hey, I'm a software guy, so what do I know?

 

[grimpr]

Hans has unfortunately drunken too much of the Green Kool Aid and has become a radicalised AMDroid.



He is a genius and a great, great man.


Elmer has grown weary of the nonsense so many AMD fanboys go on with, so he might be a tad standoffish towards you initially, but if he knows who you are, I suspect he would enjoy conversing with you and fruitful conversations could be had for both parties.

LOL. :thumbsup:

 

[nonameo]

Yea, I don't understand how a revision with higher IPC is coming down the pipeline if AMD is already shipping (more expensive, lower clocked) Opterons?


Are they just expecting server customers to accept lower performance? Are there actually two dies for BD (instead of just the one?).

Consider this. Most of the server processors are going to be low clocked parts that are in an MCM package. However, despite clockspeed changes it looks like the L3/NB/MC are all clocked at the same speed as the desktop counterparts. Perhaps if there are memory controller problems, it will be less of an issue in the server parts as the clockspeed:L3 ratio is more favorable.

 

[BlueBlazer]

<- shudders and thinks to self about SUN Niagara...

Let me guess.... Sun Niagara also uses CMT?

 

[Idontcare]

Let me guess.... Sun Niagara also uses CMT?

http://en.wikipedia.org/wiki/UltraSPARC_T1

Including the shared FPU while referring to individual INT cores as "cores".

It serves a very unique niche marketspace.

There's a T2 on the market now, as well as a T3 nearing completion.

I personally worked on the process tech for the T1 and the T2, have held wafers of them in my hands, etc. The microarchitecture is different, innovative, but it turned out to pretty much suck with anything that could not be readily and easily parallelized (i.e. the embarrassingly parallelized cases).

Not an issue for VM's though! So I really do think bulldozer is going to shine even if it is the x86 equivalent of Niagara.

 

[podspi]

In all fairness, it also depends on what those VMs are being used for. Sometimes latency does matter...


But hopefully BD isn't the x86 equivalent of Niagara... They ARE planning on putting it into laptops after all...


And IDC, that's really cool you worked on the process tech for the T1 :thumbsup:

 

[Voo]

Not an issue for VM's though! So I really do think bulldozer is going to shine even if it is the x86 equivalent of Niagara.

I'm not so sure about that. As you say the SPARC processors have a quite unique niche where they shine nicely - lots of extremely weak cores. But then that's a niche only for good reasons too. While there are many things that scale fine to a few hundred cores or more, there are still many situations where you need some baseline performance. Eg while you can certainly distribute a webservice like say google easily in such a way, the latency of a single request would be horrible (actually google wrote some papers about pretty much that topic and why lots of weak cores are problematic in that regard). So basically we're interested in applications that scale nicely and have no problem with a high latency. That excludes quite a large number of applications (and also lots of VMs at that).

But then I doubt AMD will travel too far down that road and if they strike the right balance this could all work out just fine.

PS: I think you're off by one as far as TXs are concerned - I'm quite sure the T3 was released some time ago.. not that it matters much.

 

[Idontcare]

I'm not so sure about that. As you say the SPARC processors have a quite unique niche where they shine nicely - lots of extremely weak cores. But then that's a niche only for good reasons too. While there are many things that scale fine to a few hundred cores or more, there are still many situations where you need some baseline performance. Eg while you can certainly distribute a webservice like say google easily in such a way, the latency of a single request would be horrible (actually google wrote some papers about pretty much that topic and why lots of weak cores are problematic in that regard). So basically we're interested in applications that scale nicely and have no problem with a high latency. That excludes quite a large number of applications (and also lots of VMs at that).

But then I doubt AMD will travel too far down that road and if they strike the right balance this could all work out just fine.

PS: I think you're off by one as far as TXs are concerned - I'm quite sure the T3 was released some time ago.. not that it matters much.

(yeah, T3 was launched in 2010, realized this only after I made my post...I'm so used to years, literally years, passing between the time when I've seen the chips boot OSes versus the time they are finally public domain launched that I get confused as to when a chip is finally public domain...T3 "came out" a year ago, T4 has not)

Regarding the quip about bulldozer being a niagara-like x86 chip...I was really just trying to be charitable I'm actually not interested in disparaging any given chip because chances are that I know someone who works on it/worked on it and I personally don't like the idea that they might take it personal when/if they happen to read my posts. Sure I like to make jabs all in the name of fun but they usually know that's all that it is (because they know me IRL and they know I am a comically cynical bastard at heart).

 

[Smartazz]

I hope Bulldozer comes out soon, seeings as this thread is now 65 pages long. If they could get 15&#37; more IPC than Phenom II, I think they'll be competitive. Have we ever seen a performance jump as large as Pentium D/Athlon X2 to Core 2 Duo? Seems like Conroe to Penryn to Nehelem to Westmere to sandy bridge didn't have the IPC increase that Conroe brought with Core 2 Duo.

 

[Makaveli]

I hope Bulldozer comes out soon, seeings as this thread is now 65 pages long. If they could get 15% more IPC than Phenom II, I think they'll be competitive. Have we ever seen a performance jump as large as Pentium D/Athlon X2 to Core 2 Duo? Seems like Conroe to Penryn to Nehelem to Westmere to sandy bridge didn't have the IPC increase that Conroe brought with Core 2 Duo.

The reason the gap was so large between Core 2 duo and P4 was the P4 had low IPC.

 

[Smartazz]

The reason the gap was so large between Core 2 duo and P4 was the P4 had low IPC.

Core 2 Duo was also considerably faster than Athlon X2, which had decent IPC.

 

[Abwx]

Core 2 Duo was also considerably faster than Athlon X2, which had decent IPC.

Yes , in sysmark tests it was quite better......
Though "considerably" is not a very accurate word..

Here anand s review at the time :
http://www.anandtech.com/show/2045/11

 

[dma0991]

Pre-order prices of AMD FX-Series CPUs

If price reflects the relative performance then I have a bad feeling that BD is going to be a flop. :hmm:

 

[LOL_Wut_Axel]

Pre-order prices of AMD FX-Series CPUs
If price reflects the relative performance then I have a bad feeling that BD is going to be a flop. :hmm:

$190 for the FX-6100? That's the same as the current X6 1100T...

Those prices look too low.