Discussion Future ARM Cortex + Neoverse µArchs Discussion

[Geddagod]

They are the same.

The quality isn't great (ideally you would take multiple shots at different exposures and combine them). All the pretty die shots from AMD/Intel/Apple are composite shots with individually adjusted exposures.

Compare the top right 715 on the Snapdragon to the bottom right on the Dimensity. If you flip one on the vertical, they appear virtually identical, save for the different exposures. The middle square along the right (with a "notch" in it) is darker on the Dimensity, but it is there.

Hmm, thanks
idk, I thought the a715 in the snapdragon looked slightly "fatter" than the one in the dimensity in the width: height proportions

 

[FlameTail]

Yeah the resolution of these images aren't great.

Techinsights has got good images but you need a subscription to view those.

Perhaps someone with a subscription can share the images, if that's allowed (?)

 

[Geddagod]

Yeah the resolution of these images aren't great.

Techinsights has got good images but you need a subscription to view those.

Perhaps someone with a subscription can share the images, if that's allowed (?)

Nah, I'm pretty sure they are NDA'd
Also, Techinight subs are extremely expensive. Heard they were in the hundreds of thousands of dollars range... they don't really sell subscriptions to individuals- but companies themselves.

 

[FlameTail]

Snapdragon 8 gen 3 clock speeds leaked:

1× X4 @ 3.3 GHz
2× A720 @ 3.15 GHz
3× A720 @ 2.96 GHz
2× A520 @2.27 GHz

This is insane. They are running the middle cores at 3.15 GHz!

Holy dog.

Can you believe this?
It was only a few years ago that the prime core broke the 3 GHz barrier.

TSMC N4P benefit I guess. Chips made on TSMC P nodes have always been remarkable- Snapdragon 865, A13 Bionic [N7P], A15 Bionic [N5P]

 

[Antey]

This is insane. They are running the middle cores at 3.15 GHz!

Considering that Apple A17 has TWO P cores are running at 3.78 GHz and 4 e cores running at 2.11 GHz

And this soc has 1 prime core running at 3.3 GHz and 2 cores running 3.15 GHz

not impressive.

 

[soresu]

Snapdragon 8 gen 3 clock speeds leaked:

1× X4 @ 3.3 GHz
2× A720 @ 3.15 GHz
3× A720 @ 2.96 GHz
2× A520 @2.27 GHz

This is insane. They are running the middle cores at 3.15 GHz!

Holy dog.

Can you believe this?
It was only a few years ago that the prime core broke the 3 GHz barrier.

TSMC N4P benefit I guess. Chips made on TSMC P nodes have always been remarkable- Snapdragon 865, A13 Bionic [N7P], A15 Bionic [N5P]

It doesn't really make much sense to run A720 so highly clocked considering X4 is the more power efficient core.

I'm thinking that ARM have bumped the licensing cost of Cortex X and QC don't want to pay any more for it than they have to in order to remain moderately competitive with Mediatek.

It's even weirder still that the 3C A720 cluster is a mere 190 Mhz slower than the 2C A720 cluster - they might as well just dump A520 altogether from the design and clock the 3C A720 cluster at 2.5 Ghz where it will run much more efficiently.

 

[DrMrLordX]

they might as well just dump A520 altogether from the design and clock the 3C A720 cluster at 2.5 Ghz where it will run much more efficiently.

They may be using the A520 cluster the same way Meteor Lake uses its two SoC cores.

 

[naukkis]

It's even weirder still that the 3C A720 cluster is a mere 190 Mhz slower than the 2C A720 cluster - they might as well just dump A520 altogether from the design and clock the 3C A720 cluster at 2.5 Ghz where it will run much more efficiently.

Those clocks aren't static but peak frequencies. There's no efficiency benefit with limiting peak clocking ability. SOC switch between cores by task demand - and offering possibility to increase temporarily core freq before or instead core switch will increase both efficiency and system responsivity.

 

[hemedans]

It doesn't really make much sense to run A720 so highly clocked considering X4 is the more power efficient core.

I'm thinking that ARM have bumped the licensing cost of Cortex X and QC don't want to pay any more for it than they have to in order to remain moderately competitive with Mediatek.

It's even weirder still that the 3C A720 cluster is a mere 190 Mhz slower than the 2C A720 cluster - they might as well just dump A520 altogether from the design and clock the 3C A720 cluster at 2.5 Ghz where it will run much more efficiently.

We don't know that, A720 may be more efficient but couldn't achieve higher single core perfomance, like in previous X cores A78 was better core up to 2W, for X cores to surpass A78 they had to use more power.


Most smartphone can't sustain these soc and will throttle to reasonable power like 6W, so it make sense to Have powerfull A720 cores which will handle most tasks while use less power and leave X4 for burst perfomance.

Also arm middles cores are not yet ready to be used as low cores, Apple one or Arm A5x use less than 0.5W while these middle cores use around 1W, it will significantly reduce standby time of a phone.

 

[FlameTail]

I have been theorizing, perhaps one of the reasons for the inefficiency of the Tensor G1 and G2 was that the twin X1 cores were in the same cluster.

This means that when only one X core is needed for those bursty tasks, the second X core also gets activated (due to being in the same cluster), thus drawing some power.

Idk if this is correct because there are certainly other designs with twin prime cores such as Apple A series chips or midrange Android SoCs with a 2+6 [A7xx + A5xx] configuration. Although a counterpoint to that argument would be Apple's P cores and A7xx are more power efficient.

 

[FlameTail]

https://x.com/OreXda/status/1716308773546172598?s=20

Hey guys, can someone refute what they are saying in this tweet? I believe they are having some wrong understanding.

 

[moinmoin]

So Arm is taking GB 6 "MT" seriously... 🤦‍♂️

(image from above X link/tweet)

 

[FlameTail]

No no I was pointing to what they were saying about DynamIQ and the DSU. It's incorrect, is it not?

 

[FlameTail]

hey I just realised: ARM Cortex X cores have greater IPC than x86 cores?

GB6 Single-Core:

Cortex X4 = 2250 points @ 3.3 GHz
(Snapdragon 8 gen 3 leaked benchmark)

i9 13900KS = 3100 points @6 GHz

So if we calculate the IPC by Score/Clock speed:

SD8G3: 681.8

i9 13900KS: 516.6

 

[soresu]

I have been theorizing, perhaps one of the reasons for the inefficiency of the Tensor G1 and G2 was that the twin X1 cores were in the same cluster.

Aren't they fabbed on Samsung's inferior 4N process node?

 

[FlameTail]

Aren't they fabbed on Samsung's inferior 4N process node?

TG1 and TG2 were Samsung 5LPE

 

[FlameTail]

https://x.com/Tech_Reve/status/1716411225331143102?s=20

Leaked GB6 scores of Snapdragon 8 gen 3.

2200/7400

That is almost 50% more than 8G2.

HOW DID THEY DO IT.

HAW???

😱

 

[Glo.]

https://x.com/Tech_Reve/status/1716411225331143102?s=20

Leaked GB6 scores of Snapdragon 8 gen 3.

2200/7400

That is almost 50% more than 8G2.

HOW DID THEY DO IT.

HAW???

😱

Mahogany Crankshaft.

 

[DrMrLordX]

Mahogany Crankshaft.

Oh my, that's going to be expensive.

 

[ikjadoon]

So Arm is taking GB 6 "MT" seriously... 🤦‍♂️

And they should, IMO. The multi-core changes are, to me, good. For so long, manufacturers have been throwing cores at any MT deficiency problem, hoping "more cores fixes everything!" But that's now how consumer software works.

There are a lot of embarrassingly parallel benchmarks that enterprise / datacenters use, but they don't really belong in a consumer benchmark. If you want to benchmark extreme loads, IMHO, it's not designed for consumers.

Geekbench isn't on some island of ignorance here. Everyone in CPU microarchitecture design relies on Geekbench: Qualcomm, Intel, AMD, MediaTek, Arm, etc. all use it. GB6 is a cross-platform consumer CPU benchmark that is 1) accessible, 2) reliable, and 3) scalable. Now, MT scores are properly scalable by examining cache, RAM, and other CPU I/O bottlenecks in and out of a CPU die.

The key part is that Geekbench aligns usually very well with both industry standard CPU benchmarks like SPEC & consumer workloads like image editing, web browsing, etc.

 

[ikjadoon]

Arm's earlier ~7% GB6 uplift seems to have been measured with GB6.0. The latest testing is now with GB6.1+ and Arm had a major IPC uplift this year: +10% IPC uplift. That's stellar cadence.

Percentages are normalized to the X3.

1. Apple A17 Pro - 774 pts / GHz (3.78 GHz / 2,926 pts) - 121.1%
2. Qualcomm SDXE / Oryon - 750 pts / GHz (4.30 GHz / 3,227 pts) - 117.4%
3. Qualcomm SD8G3 / Arm Cortex-X4 - 706 pts / GHz (3.30 GHz / 2,329 pts) - 110.5%
4. Qualcomm SD8G2 / Arm Cortex-X3 - 639 pts / GHz (3.36 GHz / 2,146 pts) - 100.0%

Arm's Cortex-X4, in GB6 IPC, is really closing the gap vs Apple P-cores that, on average, have achieved very low IPC uplifts since 2020.

As we talked about in the Qualcomm Oryon threads, Oryon was delayed so long + Arm executed so consistently that the Cortex-X4 (devices launching 7+ months before Oryon devices) achieves 94% of the Oryon IPC. We've been waiting 3+ years for NUVIA's Phoenix uArch and it's now coming out that Arm's IPC was just right behind it all along.

That is incredible.

 

[FlameTail]

Where did you get the numbers for SD8G3 and SD8G2 from?

I haven't seen them score that much

1. Qualcomm SD8G3 / Arm Cortex-X4 - 706 pts / GHz (3.30 GHz / 2,329 pts) - 110.5%
2. Qualcomm SD8G2 / Arm Cortex-X3 - 639 pts / GHz (3.36 GHz / 2,146 pts) - 100.0%

Arm's Cortex-X4, in GB6 IPC, is really closing the gap vs Apple P-cores that, on average, have achieved very low IPC uplifts since 2020.

As we talked about in the Qualcomm Oryon threads, Oryon was delayed so long + Arm executed so consistently that the Cortex-X4 (devices launching 7+ months before Oryon devices) achieves 94% of the Oryon IPC. We've been waiting 3+ years for NUVIA's Phoenix uArch and it's now coming out that Arm's IPC was just right behind it all along.

That is incredible.

 

[Nothingness]

Where did you get the numbers for SD8G3 and SD8G2 from?

I haven't seen them score that much

He literally provided links

 

[FlameTail]

where the hull is ARM's claimed 40% energy efficiency over the X3??

 

[FlameTail]

@ikjadoon it seems although ARM has closed the IPC gap with Apple P and Oryon, it seems they still have a long way to go for energy efficiency.