Has Xbitlabs already benched Bulldozer?

[wlee15]

Well what I understand is that AMD's wafer supply agreement with Globalfoundries requires AMD to purchase a set minimum number of wafers with AMD paying penalties if they don't purchase the set amount(I'm pretty sure that AMD has never met the minimum amount). So the reduction in yield due to die size is partially offset by the reduction in the penalties that AMD pays to Globalfoundries.

 

[gplnpsb]

I think it is important to point out that

1) According to rumors, there is only one die for client of server, so Zambezi might have a lot of extra stuff unnecessary for client CPUs (to support MP, etc)

2) From what I've heard (also rumor of course!) the layout of BD is such that there is room for a GPU/another module, and so a lot of that space on the die is empty (no transistors).


Both of those things might affect your analysis, since Intel has enough volume to have separate dies for its Xeons and i7s, and not all the die-space in Zambezi may actually be used (which from what I can tell, you assumed).

Maybe. I did assume that all the space was used. You can see similar "empty areas" on thuban die shots. I read somewhere that they appear empty because the die shot is of a single metal layer. There may be transistors on any of Orochi's 10 other layers in those areas. Regarding the rumor that there is space for another module, I never really saw the logic in that one. Someone photoshopped out 4 MB of L3 cache and replaced it with a module. You'd have a cache starved 10 Core processor, it doesnt make a whole lot of sense. Generally if space is truly empty, it's for very good reason, like scalability between the quad and dual core sandy bridge dies. I just can't buy the empty space theory for bulldozer.

Now regarding your one die point, though Intel certainly has larger volumes, they don't always do a separate die for client and server. For instance, if you check Intel's MDDS database, the Core i7-980X (SLBUZ) and Xeon X5680 (SLBV5) both use the same westmere die. The same is true for the 45 nm client and server bloomfields. I believe the same to be true for Sandy Bridge E. Looking through the MDDS database, there appear to be four core and eight core SB-E dies, however both are capable of 4P scalability. The scalability just gets disabled in client and 1P Xeon processors. To be fair to your point though, the LGA1155 Sandy Bridge die is not scalable beyond 1P servers.