True that early information point to use of bulk silicon for next CPUs ,
but why would GF use a more expensive process for lower value ICs.?..
According to the infos , ST FD-SOI is better than TSMS s bulk
so why should GloFo s own bulk be better than the former..?.
You lost me there.
This isn't a question of whether SOI reduces power usage. Presumably it does.
The question is if you take power usage for 32nm with SOI versus 28nm without SOI.
How much benefit did SOI give 32nm in terms of reducing the power of 32nm? Because that benefit, however big or small, won't be there on the 28nm bulk-Si that AMD's steamroller chips will be manufactured with.
So if SOI was immensely beneficial in reducing power usage on 32nm, then the lack of SOI at 28nm will probably mean that 28nm bulk-Si will have comparable leakage to that of 32nm w/SOI. Meaning steamroller will likely have comparable leakage to that of bulldozer, and that will answer the question of that is the thread title.
However, if SOI provided little benefit in reducing power usage of 32nm, then the absence of SOI from AMD's 28nm CPU's won't be detrimental and AMD's 28nm CPU's can be expected to have a significant reduction in power usage.
They either need it or they don't. If they need it then it is going to be a problem that it isn't there on 28nm. If they don't need it on 28nm then they probably didn't need it on 32nm and likewise won't really need it for 22/20nm either.
(Steamroller is not a low-value IC)
Personally I believe SOI provided AMD great benefit for lowering bulldozer's power usage, and I think steamroller is going to see no improvement in power usage despite the half-node shrink because it loses the benefit that SOI provides.
Steamroller will be cheaper to manufacture, shrinking it and dropping SOI are all cost-reduction moves, but they are not performance enhancing moves when you are TDP and clockspeed limited to start with.