Help with simple(?) circuit

[gbeirn]

Its been close to 15 years since I took a logic design class. I've had some free time lately and have been messing around with easyeda and 123d circuits.

I've recently come across a real world problem I want to design a circuit for but I've been stumped on how to implement it.

Basically I want a circuit that can detect a mains power drop, 5V DC, and turn on a LED that will be powered from a charged capacitor(s). Basically a notification that main power has failed.

I've got the capacitor part down and in my simulations can power the LED for the time I require, only a min or two. Problem is the LED is always powered, even when main power is on. I only wanted the LED to come on when main drops to 0V.

I figured a simple transistor circuit could do it, I've created a couple of simulations but can't seem to accomplish what I want. Any ideas?

Thanks!

 

[mindless1]

I'm not in front of an app right now but it seems like you should be able to put a blocking diode in front of a capacitor (to isolate it from feeding anything but the LED) and a relay, energized by the PSU when it has AC power, that relay normally closed (when AC turns off) connects the capacitor to the LED.

Then again, it would be a lot simpler and cheaper to just have an LED indication when AC power is on, and LED off indicates no AC power, or at least an insufficient amount... ready made LED night light that costs ~$1 delivered.

Is this for safety when working on mains home wiring or ??? While you could see the LED at a much greater distance, an AC voltmeter module would give more quantifiable info.

 

[gbeirn]

Thanks, this is not for main house wiring. Just a low voltage DC circuit for hobby use. Think the red LED that turns on on a UPS during power failure. Not using AC for this of course but same idea. Just be able to quickly glance and see if the main 5V is suppling power or the capacitors ( possible a battery pack In the future).

 

[Red Squirrel]

This is what I did to detect AC power failure for my house, I used a basic "wall wart" and I have it so when it's plugged in, it turns on a relay. The relay has 3 terminals so that I can wire it in NO or NC configuration. I then have an alarm point on an arduino that is normally closed, so when it sees digital value 1 it means the power is on. If power goes out, the relay opens, and then the arduino sees value 0 on that digital pin, and then it triggers an AC power failure alarm. (I have a server that takes care of all that, the arduino is just to get the data into the server). Using a similar relay you could set it up so the LED circuit is broken by the relay when the relay is turned on. When relay turns off it would complete the circuit.

Keep in mind that my method has a bit of a delay because of the capacitors in the wall wart, so this would not be suitable for a UPS application but fine for an indicator as it would turn on within a second.

 

[gbeirn]

Deep: nevermind

 

[mindless1]

Thanks, this is not for main house wiring. Just a low voltage DC circuit for hobby use. Think the red LED that turns on on a UPS during power failure. Not using AC for this of course but same idea. Just be able to quickly glance and see if the main 5V is suppling power or the capacitors ( possible a battery pack In the future).

What simulations have you tried thus far? It seems as though you just need a NOT gate and to experiment with resistor values. See the following page, towards the middle, "Not Gate using NPN Transistor" where in the diagram, +5V is the capacitor, X is the primary 5V supply, and Z would go to the LED anode, and LED cathode going to common ground.

http://www.electronicshub.org/digital-logic-not-gate/

You will need a blocking diode between the primary 5V and the capacitor (assuming that 5V is what keeps it charged) so it doesn't back-feed and drive the transistor base when the primary 5V is off, nor (possibly) drain into the primary 5V supply circuit instead of only the LED.

 

[MrDudeMan]

I can design something more complex using logic gates if you desire to increase the complexity of the circuit. The trade-off is design complexity and component cost versus efficiency. This circuit isn't very efficient, but it will work and it's simple.

The pulldown resistor on the gate of the pfet should be 10k, at least to start. 5 V / 10 kohms = 500 uA, which isn't a lot of wasted power. You could certainly lower it depending on other variables, but 10 k is a good place to start.

The load resistor should be sized depending on how much current you want to draw. The capacitor will be charged to roughly 4.3 V assuming you use a cheap PN junction diode, e.g. 1N4001. Red LEDs typically have a forward voltage of 1.8 V and you probably want roughly 5 mA to illuminate it sufficiently. That means you need to size the resistor to draw 5 mA and drop 4.3 - 1.8 = 2.5 V. 2.5 V / 5 mA = 500 ohms. Substitute better values as you see fit and try to lower the current of the LED if you want it to stay on longer. The brightness is a function of current and that curve is going to be diode specific. Some LEDs are bright at 10 mA and others are bright at 1 mA.

 

[William Gaatjes]

You want basically a circuit that can latch and hold the state of a power loss situation.
With a relay with double NO +NC contacts it is the most easy.
When power is present, press the hold switch S1 to arm the relay K1 (contact K1-1 is a hold contact for switch S1) and the lamp or led will turn off because contact K1-2 will open when the relay is armed.
When power fails, the relay will revert to rest position and through the second NC contact (K1-2) the lamp or led will stay on when power returns.
As long as there is power the lamp will turn on again but the relay will have to be armed manually again for the next power fail event.

edit:
I forgot to draw the light arrows , but the diode is light emitting diode (LED).

 

[sdifox]

solid state relay should do the trick

https://www.automation.com/library/...ndustrial-io/understanding-solid-state-relays

 

[MrDudeMan]

Latching wasn't explicitly part of the initial requirements. If latching is desired, any CMOS circuit capable of storing a bit will work well, e.g. D flip flops, SR latches, etc. Relays are common in hobby circuits, but they pointlessly generate heat and draw power while also being slow, potentially loud, potentially bouncy, and easily replaceable with logic devices. SSRs are better, but I'd still use logic devices.

Here's a circuit that will latch the output for 20 minutes with a 10 uF capacitor (C2) and the total area can be as small as 0.76 cm^2:

Notes:

• Using a schottky diode (D3) will allow for a higher capacitor voltage
• The D flop will clock when +5 VDC goes away. The use of a schmitt triggered buffer will prevent bouncing and metastability in the inverter, which could cause a lot of power draw. Because D is tied high, additional clock pulses will not change the output. When a 1 is clocked in, Q will go high and !Q will go low. This is the essence of your alert.
• The D flop can be cleared (Q will go low and !Q will go high) by pressing S1. You could also get fancy and clear this with a timer circuit or some other mechanism.
• The Set (S) input is tied low to prevent it from setting the outputs (Q high and !Q low). The reason for not using this input, though it would be conceptually simpler, is because you could inadvertently cause the S and R inputs to conflict. Using the clock and data inputs avoids that issue entirely.
• Powering the inverter and flop from +4.8 VDC means your memory storage element will remain powered for as long as you want depending on the size of C2.

At this point, you have no indication of the alarm if it triggers, but the state will be stored. You now have a choice about how you want to be notified. Using two LEDs is an option to give you a more clear indication of power fault vs. no power fault (red and green respectively as only one will be on at a time). The no power fault state will be powered by the power supply, so adding an LED wouldn't change any of the power draw of the capacitor-powered circuit.

If you power the LED from C2 by using the flop's power supply, the amount of time the bit will be retained is going to be significantly impacted:

Your other option is to power the LED(s) from +5 VDC directly so the alarm is visible when power is restored. This method will not indicate an alarm when power is off because C2 will not provide power to the LED(s). Also, you have to remember the logic will be reversed (active low), so !Q becomes Q and Q becomes !Q. In other words, when a bit is clocked in, Q will go high, which will turn off D1 because the flop is now sinking power instead of sourcing it:

The power draw will be 0.04 uA (for the logic devices) + LED, which is up to you.

 

[William Gaatjes]

To be honest. I never wrote it was the most power efficient. It is the most easy circuit however. Bouncing contacts is irrelevant since a human is pressing the button, creating a enough long delay to let the relay contacts stabilize.
Static cmos logic can have very low power consumption. As an alternative, a nano amp quiescient current comparator can also be used as a latching device and to detect a lowered or missing voltage level.

To the op :
The free program LT spice from linear technology might help out. As an alternative, Texas Instruments also has a simulation program.

 

[MrDudeMan]

It is the most easy circuit however.

You considered every possible circuit that could possibly be created to solve this problem and then determined the one you picked, which uses a power rail the OP doesn't have, is the absolute simplest circuit?

Bouncing contacts is irrelevant since a human is pressing the button, creating a enough long delay to let the relay contacts stabilize.

It was in a long list of reasons why mechanical relays are substandard for most applications. If the OP decides to scale his detector to count more than one power failure event, bouncing becomes important immediately because all relay contacts bounce when moving both directions unless specifically designed not to, which almost none are. There's no reason to ignore bounce because better solutions that don't bounce already exist. Mechanical relays are also slow enough that they could completely miss a power failure event. I built your circuit and it missed every power failure below 1 ms with the relay I had on hand. Digital logic gates won't have that problem. Since there are no specifications, you have to assume all failures should be tracked.

Static cmos logic can have very low power consumption.

Yes, that's why I used it.

As an alternative, a nano amp quiescient current comparator can also be used as a latching device and to detect a lowered or missing voltage level.

The gates I used draw 20 nanoamps of quiescent current; it's not going to get any lower than that without a lot more effort for no gain whatsoever. Also, comparators don't maintain state, so that isn't going to help until you add a memory device.

As an aside, if the OP wants to track intermittent power failures that could happen more frequently than he'll physically witness, he can simply serialize more flops as the rest of the circuit is already designed to scale. Add as many flops as you want to increase your memory depth, so if you are experiencing power failures more than once every few hours, you'll be able to see the successive alerts.

Microcontrollers can also be sized to fit in just as small of an area as a 4013d while using the same or lower power, lower cost, and very simple programming. The requirements don't mention any of this, but good design implies consideration of power, area, cost, and future functionality. The best solution with the most features would be to use a power supervisor and a battery.

 

[William Gaatjes]

Not going to reply to it all, but a comparator can be set up to maintain a state to make it a latch. Add for example a diode in the positive feedback loop for a specific hysteresis. It will work fine as a voltage dependent latch.

 

[MrDudeMan]

Not going to reply to it all, but a comparator can be set up to maintain a state to make it a latch. Add for example a diode in the positive feedback loop for a specific hysteresis. It will work fine as a voltage dependent latch.

A comparator can be one component of a memory element, but a comparator by itself is not a memory element, which is what you initially suggested.

 

[William Gaatjes]

A comparator can be one component of a memory element, but a comparator by itself is not a memory element, which is what you initially suggested.

I did not suggest that, i did assume however that who reads the text might also understand that a comparator circuit needs some support components to get to the desired functionality. That was perhaps a bit hasty assumption.

 

[AdamK47]

Sorry, NM.