It depends on which date you pick (you could take February for higher volumes), but maybe they meant 1.5x faster, then it would be 18 months from 14nm. In any case, it's a lot better.
Look at the kind of density improvement AMD got with Carrizo on the same 28nm process. 30%+ improvement just by using high density libraries.
Do you not think that something like the A8/A8X is using similarly density-tuned libraries while a higher performance/frequency chip like the Core M isn't?
http://www.computerbase.de/2015-02/intel-von-10-und-7-nm-bis-zu-2.5d-und-3d-chips/
Mark Bohr told last week in a webcast that their 10nm chip development progresses 50% faster than their 14nm development.
If I can go out and buy a 10nm Intel CPU in 2016, I'll be impressed.
If HVM starts before the Investor Meeting, I'll be impressed.
Nope.
I think Intel will begin high volume production on 10nm in Q2 2016.
When Intel released their 22nm on 2011 they published the Sram cells areas used, thing is that when they released core M the 22nm cell area used as comparison was bigger than what was published at the time, so your slides tell absolutely nothing in respect of Intel s habits and recent history when "disclosing" their processes capabilities.
I think Intel will begin high volume production on 10nm in Q2 2016.
I'm talking about the same kind of "HVM" that started at the end of Q1 for 14nm with qualification for sale and ramp in mid-'15
From the explanation, we can see that we should subtract 1 quarter and then another one because the journey in a fab takes 1 quarter, the first quarter of volume ramp was during Q3.
So basically, if they start the "HVM" I'm referring to in November, we can subtract 1 quarter from Broadwell's launch (November) and get August release for CNL if they want to impress me.
August 2015? That's when Skylake is launching
You know I'm talking about '16.
November '15 (Q4) production, qualification in Q1, full ramp in Q2, launch in Q3.
I honestly think Intel is lying about their cost reduction benefits for 14nm ...
Not true. The 14nm SRAM in the August disclosure was compared with the "CPU" oriented 22nm SRAM cell size which came in at 0.108um^2.
The high density cell for Intel's 22nm process came in at 0.092um^2.
The ratios 0.05/0.092 and 0.0588/0.108 are nearly identical, as they should be
Why? They got a 2.2x density improvement with 14nm, while wafer cost have risen by 30%.
Why? They got a 2.2x density improvement with 14nm, while wafer cost have risen by 30%.
They published a given size for 22nm in 2011 and they never updated this data untill they released core M and 14 nm related slides in 2014, all this time people thought that the original published size was the one on use in Haswell.
You want the source.?.
Their transistor gate pitch numbers indicate a density improvement of 65% which is a far cry of their claimed 120% improvement ...
I highly doubt that wafer costs have only risen by 30% when double patterning is enforced to the whole scheme since multiple masks (which are by no means cheap) can easily double the cost of a wafer ...
We shouldn't believe everything that Intel has to say ...
Sure.
(90*80) / (70*52) = 2
The rest probably comes from the fact the Intel reduced variability so instead of multiple fins they now just need 1 or 2 per transistor.
The interconnect methology differences means intel get lower density than tsmc - yes - as evident from bw core m vs a8.
Heck it turns out nobody is stupid or incompetent but the oposite !
So Intel has indeed learned and is indeed trying harder.
Does that "50% faster" TTM mean that instead of 2.5 years, 10nm will launch 1.25 years or 15 months after 14nm?