Infinate AMD processor speed?

[soccerballtux]

Say I payed AMD or some other company to fabricate my next processor out of a possibly superconducting metal....then I got some liquid hydrogen cooling. Since there would be no electrical resistance and therefore no heat to deal with, couldn't I crank up the multiplier to the maximum the motherboard would allow?

 

[harrkev]

In theory, yes. But the problem is that NOBODY has made a super-conducting transistor yet. But millions of dollars have been spent trying. So, your wires would be lossless, but the transistors would still soak power.

But I still bet that you could get a heck of an overclock using liquid hydrogen. But no smoking allowed.

 

[f95toli]

No, beacause there are still inductive and capacative losses; computers no not operate at dc.
And you some type of three-terminal transistor-like element and all superconducting three-terminal devices are lossy to some extent.

That said, you can build superconducting processors. It was done 20 years ago, some japanese company built a simple processor in aluminium (which becomes superconducting around 1.2-1.5K); it worked buit was not very fast.

There is however a technology called RSFQ which can be used to build very fast circuits in niobium (you cool it with liquid helium), I have friends that work on RSFQ-designs and they make pretty complicated circuits (around 20 000 elements) that are designed to operate at around 60 Gb/s.

There is a foundry in NY that makes Niobium RSFQ circuits. The name of the company is Hypres and they make most of the RSFQ chips in the world (they also make chips for the US military).
Website: www.hypres.com

 

[pm]

Supercooling silicon with liquid hydrogen probably wouldn't work. Even if the circuitry all worked correctly, and if the on-board PLL was able to lock (which is doubtful) and the FSB was able to operate correctly (again, doubtful). There would likely be some race on the die that would kill the chip.

 

[Gibsons]

Originally posted by: pm
Supercooling silicon with liquid hydrogen probably wouldn't work. Even if the circuitry all worked correctly, and if the on-board PLL was able to lock (which is doubtful) and the FSB was able to operate correctly (again, doubtful). There would likely be some race on the die that would kill the chip.

what's a "race on the die?"

 

[Sohcan]

Originally posted by: Gibsons

Originally posted by: pm
Supercooling silicon with liquid hydrogen probably wouldn't work. Even if the circuitry all worked correctly, and if the on-board PLL was able to lock (which is doubtful) and the FSB was able to operate correctly (again, doubtful). There would likely be some race on the die that would kill the chip.

what's a "race on the die?"

Making a processor work at some target frequency requires more than just making circuit paths operate faster...timing is more complex than that. Latches (or flip-flops, depending on the methodology used) are sequencing elements that "store" values at the boundaries of pipeline stages...for example, if in one cycle an ALU performs an addition, and in the next cycle the value is stored to a register, you need latches to save that ALU output for use in the next clock cycle.

But latches have "rules" you must abide by for them to work correctly...there are setup and hold times, which is some minimum amount of time that the value to be latched must be stable around the time that the clock changes. Making a circuit path too fast might introduce minimum delay violations...if there is too little delay between two latches, when the clock starts to change, the new output from the first latch can contaminate the second latch and "race" through the pipeline. Races are often nasty because they can be independent of the clock frequency.

So even if you were to crank up Vdd and supercool the silicon, you can't guarantee that the chip will continue to work at higher frequencies. The timing for the chip was tuned for some target frequency, and it's likely that no amount of effort (other than a redesign of the chip) will make it work well beyond that target.

 

[f95toli]

Does anyone know at what temperature the carriers freeze out in a processor?
I don't think it is as higt as 77 K (nitrogen) but my guess would be around 20K (the freeze-out temperature is roughly the bandgap divided by kb).

A Si processors would definitly not work if you "supercooled" it to say 4K (which is still rather warm), simply because the chip would be insulating (unless the Si is so heavily doped that there is no bandgap).

That is one drawback of IV semiconductors, they do not work at low temperatures.

 

[pm]

I'm not sure if everyone calls them "races" - it might be a local thing to our design team. It's normally called a "hold time violation".

Anyway, the idea is that you have two latches back to back with very little logic in between them, and, as usual both of these latches are latched by a clock signal. As temperature decreases, silicon CMOS FET's get quite a bit faster, but wires don't improve as much (more technically: R gets better, but C is basically a constant, so your RC time constant decreases, but not as much as the FET transistor's Idsat increases due to the improvement in 'mean free path' from the temperature reduction). As you lower the temperature the clock signal doesn't really improve much with decreasing temperature because a clock signal is (in every design that I have seen) a massively RC dominated signal, so while the transistors generating the signal improve, the RC time constant doesn't much and the edge rate of the signal doesn't improve much either. Meanwhile the logic path of the signal running from one latch to the next improves significantly.

Now imagine that you have the two latches connected back to back (output of one, tied directly to the input of another) and they both receive the rising edge of a clock signal simulataneously. The input to the first latch goes to the output of the latch. Meanwhile, the clock, which is not an instaneously switching event like you see in books but is actually a signal that takes a while to rise from 0 to 1 (and back down again), is switching away. When it gets high enough, the latch closes. But the slope of the clock hasn't improved as much as the delay of the logic as the temperature goes down, so there's a 'race' can the second latch close before the signal from the first latch arrives. If the signal 'wins' then the second latch loses it's correct value and is replaced with the value that should still be stuck in the first latch. This is bad, and is what I was referring to. Ideally, the clock should always win the race. Normally designers take races into account, and so there are checks to make sure that the logic delay is longer than the time it takes to close the latch again. But fixing a race on one latch can often mean slowing down some other path, so there are limits to what kind of efforts you want to go through to make sure that a race never happens.

I actually asked around to see what other designers thought about the likelihood of temperature dependent races affecting the ability of the CPU to operate at extremely low temperatues. So my musing that these would cause a failure is probably wrong. Intel designers agreed that the PLL and the FSB would be the two most likely problems that you would run into.

 

[pm]

I took too long to ask everyone here about whether people thought that a race could be a problem at 5 Kelvin, and Sohcan answered it while we are all drawing pictures on whiteboards and musing about what on earth a VCO (Voltage Controlled Oscillator - part of a PLL) would make of 70K and what a Tcase of 5K would translate to in terms of Tdie.


Must type faster...

Carrier freeze out... I'd forgotten about that. Last time I heard about that effect was college I think. With the doping densities on modern 90nm CMOS, freeze out should be way down there. But probably above 4K, as you said, f95toli.

 

[dmens]

An asynchronous processor would not have to worry about hold times, but the one async design method I learned about in college makes assumptions on path delays to avoid race conditions. Superfast devices would make that assumption difficult to hold.

 

[f95toli]

PM: Yes, I guess freeze out is rarely a problem for most applications.

But it is an interesting phenomena which and it is a very nice way to demonstrate the conecept of a gap and the fact that IV semiconductors do need thermal excitations in order to be conducting.
I sometimes supervise an experiment where the students study the resistance vs. temperature in the intervall 77K-4K (sometimes we go down below 2K) for a few materials, one of the samples they study is doped germanium; At 77 K the resistance is about 20 ohms and it drops with temperature until about 30K, then the resistance starts to go up exponentially and at 4K it is 2.5 Mohm.
Everytime there is at least one student who thinks there is someting wrong with the equipment or doesn't notice that the measurement range of the multimeter has changed.

Hopefully all my students knows what carrier freeze out means after this experiment.

Anyway, freeze out does have some practical consquences. Low-noise electronics (detectors in astronymy fpr example) is often cooled to 4K and it would be nice to be able to put e.g amplfiers at 4K, unfortunatele there are almost no amplifers that work at that temperature.
I would personlly love to have a fixed gain (x1000 or so) low-noise amplfier that worked at 1K (dc-10 MHz), it would be very usefull.

 

[Leper Messiah]

Originally posted by: harrkev
In theory, yes. But the problem is that NOBODY has made a super-conducting transistor yet. But millions of dollars have been spent trying. So, your wires would be lossless, but the transistors would still soak power.

But I still bet that you could get a heck of an overclock using liquid hydrogen. But no smoking allowed.

hydrogen+electronics=KAPOW! have a hindenburg in your own home!

 

[Gibsons]

Low-noise electronics (detectors in astronymy fpr example) is often cooled to 4K and it would be nice to be able to put e.g amplfiers at 4K, unfortunatele there are almost no amplifers that work at that temperature.

is this because it's just hard to do from first principles, or because there's not enough market demand? Or a combination of the two?

 

[f95toli]

I'd say it is a combination.

As I have already written "normal" electronics do not work at low temperatures because it is based on silicon, and silicon with a "normal" amount of dopants becomes a very good insulator at low temperatures;so ordinary transitors and diods do not work at 1K.

There are three ways to solve this problem.
One is to use heavily doped silicon, certain "ordinary" JFET transitors do work down to very low temperatures, presumably because for one reason or another some other propertie require a lot of free carriers and a small gap. I have seen a few designs based on this, unfortunately none of them very good.

Another solution is to use III-V transitors (GaAs, GaN, InP), they work well even at low temperatures but are only really good for microwave frequencies, at lower frequencies they are usually pretty noisy (current noise) and which is of course bad since the whole purpose of cooling an amplifier is to reduce the noise.

The third way is to build the amplifier using some other technology, superconducing SQUID amplifiers are commerically available and are very good; unfortunately they are a bit tricky to use and require a lot of "extra" electronics; they are however quite often used in applications where low-noise is really important (and they are actually not that expensive, you can get a complete setup for about $7000, a good conventional amp costs about $3000).

Low-noise amps are often designed by the people who use them, often using ordinary components in new ways; often it is just a question of trial-and-error (this transitor works at 4K, this does not etc)

There is a journal called "Review of scientific instruments" where you can find a lot of information about this, the EE people at NASA publish many of their papers in RSI.

 

[Calin]

Originally posted by: f95toli
PM: Yes, I guess freeze out is rarely a problem for most applications.

But it is an interesting phenomena which and it is a very nice way to demonstrate the conecept of a gap and the fact that IV semiconductors do need thermal excitations in order to be conducting.
I sometimes supervise an experiment where the students study the resistance vs. temperature in the intervall 77K-4K (sometimes we go down below 2K) for a few materials, one of the samples they study is doped germanium; At 77 K the resistance is about 20 ohms and it drops with temperature until about 30K, then the resistance starts to go up exponentially and at 4K it is 2.5 Mohm.
Everytime there is at least one student who thinks there is someting wrong with the equipment or doesn't notice that the measurement range of the multimeter has changed.

Hopefully all my students knows what carrier freeze out means after this experiment.

Anyway, freeze out does have some practical consquences. Low-noise electronics (detectors in astronymy fpr example) is often cooled to 4K and it would be nice to be able to put e.g amplfiers at 4K, unfortunatele there are almost no amplifers that work at that temperature.
I would personlly love to have a fixed gain (x1000 or so) low-noise amplfier that worked at 1K (dc-10 MHz), it would be very usefull.

Anyway, the change from 77K to 30K is much less important than the change from 30K to 4K - especially considering that lower than that, you have the absolute zero.
I was sure that silicon wouldn't work at too low a temperature, but that temperature I thought was warmer than liquid nitrogen. Never thought it's so low...

 

[f95toli]

I think most Si transistors still work at 77K (but their parameters will be nowhere near what you find in the datasheet).
I have cooled down a few op-amps to 77K just for fun and most of them work (but they have a tendency to break when you warm them up because of the mechanical stress).