Intel 10nm and GF 7nm at IEDM 2017

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Dayman1225

Golden Member
Aug 14, 2017
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Isn't it the first time for all? It's not like they share with others.

First time for what? Cobalt? Yes, though it seems Intel decided to use it quite a bit more which will effect yields negatively. AFAIK SAQP is new to both GloFo and Intel, but I think yet again Intel used it in more areas than GloFo, yet again effecting yields negatively.
 
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maddie

Diamond Member
Jul 18, 2010
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Even if you don't know the details its a quite enormous help to know you're trying to do the right thing
This isn't the warp drive from out of nowhere, or like how the EM drive arrived. Everyone in the industry is aware of the potential benefits of Cobalt.
 
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maddie

Diamond Member
Jul 18, 2010
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First time for what? Cobalt? Yes, though it seems Intel decided to use it quite a bit more which will effect yields negatively. AFAIK SAQP is new to both GloFo and Intel, but I think yet again Intel used it in more areas than GloFo, yet again effecting yields negatively.
Are you saying this a good decision or a poorly thought out one? Seems like overreach to me. For certain, they're paying a heavy price.
 

raghu78

Diamond Member
Aug 23, 2012
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First time for what? Cobalt? Yes, though it seems Intel decided to use it quite a bit more which will effect yields negatively. AFAIK SAQP is new to both GloFo and Intel, but I think yet again Intel used it in more areas than GloFo, yet again effecting yields negatively.

Yeah it looks like Intel bit off a bit more than they could chew.

1. Cobalt contacts, metal layers M0,M1 and cobalt cap for copper interconnect M2-M5
2. SAQP for lowest metal layers.
3. Single Dummy gate
4. Contact over Active Gate.

Anyway this experience at 10nm will make them be a bit more conservative at future nodes.
 

raghu78

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Aug 23, 2012
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Are you saying this a good decision or a poorly thought out one? Seems like overreach to me. For certain, they're paying a heavy price.

yeah in hindsight it looks to have been a poor decision. GF saying sticking with copper/low k for metal interconnect layers brings reliability benefits in the form of reduced complexity and yield risk seems to indicate that the aggressive use of cobalt is probably causing yield challenges at Intel 10nm.
 
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Dayman1225

Golden Member
Aug 14, 2017
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Yeah it looks like Intel bit off a bit more than they could chew.

1. Cobalt contacts, metal layers M0,M1 and cobalt cap for copper interconnect M2-M5
2. SAQP for lowest metal layers.
3. Single Dummy gate
4. Contact over Active Gate.

Anyway this experience at 10nm will make them be a bit more conservative at future nodes.

As they say, go big or go home
 
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raghu78

Diamond Member
Aug 23, 2012
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As they say, go big or go home

Thats a poor line of thinking especially when Intel had the process node lead at 14nm. They just needed to deliver a decent bump in perf and density with a good time to market lead over foundry 7nm( atleast 1 yr). Intel could then have moved to their next node aggressively using EUV by 2020.
 
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CatMerc

Golden Member
Jul 16, 2016
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First time for what? Cobalt? Yes, though it seems Intel decided to use it quite a bit more which will effect yields negatively. AFAIK SAQP is new to both GloFo and Intel, but I think yet again Intel used it in more areas than GloFo, yet again effecting yields negatively.
Basically Intel was more aggressive. The aggression didn't pay off.
 

LTC8K6

Lifer
Mar 10, 2004
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Later? Sure. Often dropping the baton loses the race.
Well, Intel is technically trying to do 7nm with cobalt now, since their 10nm is like everyone else's 7nm.

When Intel goes to what they call 7nm, it will be like everyone else's 5nm, I think.

You have to try if you want to advance.
 
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raghu78

Diamond Member
Aug 23, 2012
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I don't think we know yet if it will pay off.
The delays to 10nm are going to hurt Intel a lot in the short term till 2020/2021. Long term we have to wait and see how things play out.

Sent from my SM-G935V using Tapatalk
 

CatMerc

Golden Member
Jul 16, 2016
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I don't think we know yet if it will pay off.
Intel went from a few years lead from other foundries (not in names but in actual density and performance) to being on par with others. 10nm already lost them that. By the time we will see HVM 10nm products, TSMC will already be in HVM of their equally dense 7nm.

Whatever damage it might do or if it will be successful doesn't change the massive loss in time to market lead.
 
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LTC8K6

Lifer
Mar 10, 2004
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I never thought Intel really had the 3 year lead it claimed to have, or whatever it was, exactly.
 

CatMerc

Golden Member
Jul 16, 2016
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I never thought Intel really had the 3 year lead it claimed to have, or whatever it was, exactly.
Intel's 14nm Skylake released in late 2015. Other foundries 10nm just caught up with its density using their 10nm. The first product with 10nm was Galaxy S8 released in April 2017. That's a very large lead whatever way you slice it.

I don't buy into the 3 years lead marketing either, but there was a lead.
 
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maddie

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Jul 18, 2010
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Intel went from a few years lead from other foundries (not in names but in actual density and performance) to being on par with others. 10nm already lost them that. By the time we will see HVM 10nm products, TSMC will already be in HVM of their equally dense 7nm.

Whatever damage it might do or if it will be successful doesn't change the massive loss in time to market lead.
I agree.

The point is not that eventually it will work, but what was the price. Losing the process lead and apparently still falling behind relative to the competition is not a win.
 
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raghu78

Diamond Member
Aug 23, 2012
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Intel's 14nm Skylake released in late 2015. Other foundries 10nm just caught up with its density using their 10nm. The first product with 10nm was Galaxy S8 released in April 2017. That's a very large lead whatever way you slice it.

I don't buy into the 3 years lead marketing either, but there was a lead.

Yes Intel atleast had a density lead with Intel 14nm vs foundry 16/14nm. The foundries caught up in H1 2017 with their 10nm process. TSMC is now going to beat Intel 10nm in density next year with their N7 6T low power process. TSMC will most likely beat Intel in terms of time to market and HVM yield ramp. GF 7LP 6T (7SoC) too beats Intel 10nm on density. Intel went from a significant density lead in 2015-2016 to lagging in 2018-2019. Thats how bad Intel messed up.

https://www.semiwiki.com/forum/cont...alfoundries-discloses-7nm-process-detail.html

Intel 10nm is broken according to charlie of semiaccurate. We need to wait and see when 10+ arrives and if it fixes the issues at Intel 10. Intel's recent slides with 10++ bringing a rearchitected metal stack lends further evidence that something was badly messed at 10. It could be the aggressive use of cobalt, SAQP for lowest metal layers or just the sheer complexity of multiple first time technologies at Intel (Contact Over Active Gate, Single dummy gate along with the above mentioned features) not working well together or being very hard to yield.
 
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Ajay

Lifer
Jan 8, 2001
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ntel 10nm is broken according to charlie of semiaccurate. We need to wait and see when 10+ arrives and if it fixes the issues at Intel 10. Intel's recent slides with 10++ bringing a rearchitected metal stack lends further evidence that something was badly messed at 10. It could be the aggressive use of cobalt, SAQP for lowest metal layers or just the sheer complexity of multiple first time technologies at Intel (Contact Over Active Gate, Single dummy gate along with the above mentioned features) not working well together or being very hard to yield.

Yeah, I'd bet that it was a combination of issues given the amount of time Intel is taking to resolve the problem. I'm concerned at this point that even IceLake may have relatively low yields (historically) for decent clock rates - expecting something like the CoffeeLake rollout (for different reasons, obviously). I also wonder how much the 10nm debacle is hurting 7nm deployment. Intel has great depth, but it seems like a lot of process engineers are likely being pulled in for long hours on 10nm (just a guess).
 
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Yotsugi

Golden Member
Oct 16, 2017
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Yeah, I'd bet that it was a combination of issues given the amount of time Intel is taking to resolve the problem.
I think Intel went all-in with their 10nm node, thinking they have enough time to spare should anything go wrong.
Well, and here we have it.
 

Ajay

Lifer
Jan 8, 2001
16,094
8,106
136
yeah in hindsight it looks to have been a poor decision. GF saying sticking with copper/low k for metal interconnect layers brings reliability benefits in the form of reduced complexity and yield risk seems to indicate that the aggressive use of cobalt is probably causing yield challenges at Intel 10nm.

Only if the Cobalt depo process is immature. From the materials Hans provided, it looks like it should be more reliable (better wetting for lower defect rates).
 

Ajay

Lifer
Jan 8, 2001
16,094
8,106
136
I think Intel went all-in with their 10nm node, thinking they have enough time to spare should anything go wrong.
Well, and here we have it.

Well, it looks like they did everything they could to best the competition. They will probably still be tops in electrostatics, but lose most of their density lead due competitors catching up (not that x86 CPUs are optimal for comparing density).
 
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Reactions: pcp7
Mar 10, 2006
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They will probably still be tops in electrostatics, but lose most of their density lead due competitors catching up (no that x86 CPUs are optimal for comparing density).

Business as usual for them, then, after a brief density lead.
 
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