Intel Broadwell Thread

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jpiniero

Lifer
Oct 1, 2010
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Wasn't there a news post with Jim Keller saying K12 would have a bigger engine than Zen?

Yeah, K12 was wider (better IPC) and much better perf/W but was limited in clock speed. Zen was higher clock speeds and x86 compatibility but bad perf/W.
 

cbn

Lifer
Mar 27, 2009
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Yeah, K12 was wider (better IPC) and much better perf/W but was limited in clock speed. Zen was higher clock speeds and x86 compatibility but bad perf/W.

Back when Anandtech did the x86 vs. ARM Server comparison one comment I remember (besides the ARM being 40nm) was that the software for ARM was immature.

http://www.anandtech.com/show/8357/exploring-the-low-end-and-micro-server-platforms/18

The 40nm X-Gene can compete with the 22nm Atom C2000 performance wise, and that is definitely an accomplishment on its own. But the 40nm process technology and the current "untuned" state of ARMv8 software does not allow it to compete in performance/watt.

So it may be that AMD is treading the ARM vs. X86 server waters lightly to see how aggressive Intel is with the cores. I would presume more aggressive core increases by Intel might discourage software development for the ARM servers (indirectly hurting performance per watt).
 

jpiniero

Lifer
Oct 1, 2010
14,839
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So it may be that AMD is treading the ARM vs. X86 server waters lightly to see how aggressive Intel is with the cores. I would presume more aggressive core increases by Intel might discourage software development for the ARM servers (indirectly hurting performance per watt).

I think AMD was hoping to get a semicustom deal with one of the cloud providers, and hope that they would do the work in terms of software optimization. But seemingly they were never able to get anywhere with it. Given what Intel is doing with Xeon D, it's not going to be easy now and probably not worth it now to try given their lack of money.
 

cbn

Lifer
Mar 27, 2009
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Given what Intel is doing with Xeon D, it's not going to be easy now and probably not worth it now to try given their lack of money.

One advantage ARM does have is a lot of potential partners. They also appear to make available a lot of different cpu core design each fitting into narrow niche across a relatively wide span of single thread performance. Hypothetically there could end up being a lot of different niche SoCs if they get the a Vanilla Core design (for Servers) right.

Also back in early 2014 ARM came up with the "Server Base System Architecture" in an effort to help standardize ARM server software development at the low level (in an attempt to make it standardized like x86)

http://arstechnica.com/information-...orm-as-it-sets-its-sights-on-the-server-room/



In an attempt to strengthen the entry of ARM processors into the server market, British chip designer ARM has put together the Server Base System Architecture (SBSA), a definition of a standard platform for ARM-based servers. This move should reduce the abundant variation and complexity that has hitherto been a feature of ARM systems. SBSA was assembled by ARM along with its partners, including HP, Dell, AMD, Citrix, and Microsoft.

Even as ARM processors have proliferated in smartphones and tablets and are starting to make their first tentative steps into the server room, ARM has not been a platform in the way that the x86 PC is a platform.

Way back in the early 1980s, the IBM PC defined the way the computer booted, initialized its hardware, laid out its memory, and provided access to standard features like graphics and the keyboard. This enabled an ecosystem of PC software to develop. The PC platform was cloned by Compaq and others, and these clones were functionally equivalent to IBM machines. Operating system software that worked on one clone would work on any other, and it would work on the PC itself.

Over the years, the PC platform has changed, but this compatibility has remained as a core feature.

To the chagrin of operating system developers, ARM has lacked a comparable platform. Linux creator Linus Torvalds once described the proliferation of inconsistent, incompatible ARM systems as a "fucking pain in the ass," and implored the ARM community to "push back on the people sending you crap" and devise a common platform. Intel, likewise, has used this diversity to criticize ARM.

Since that statement in 2012 there has been some progress. Microsoft essentially defined an ARM tablet platform for Windows RT, enabling its kernel to work on both Qualcomm Snapdragon and Nvidia Tegra 2 and Tegra 3-based systems. Linux developers have also managed to consolidate their support for some of the diverse ARM platforms.

Without any clear market leader in the nascent ARM server market, this diversity and lack of platform could be deeply problematic. It would prevent easy software compatibility, with each different kind of system needing its own customized kernel.

The SBSA is ARM's effort to address that very problem. An operating system that targets SBSA will be able to run on any SBSA system: it will have the same basic platform components, put together in the same way, with the same kind of firmware, boot process, interrupt and I/O handling, hypervisor, and more. For example, SBSA will require all USB 2 controllers to conform with the EHCI 1.1 specification, all USB 3 controllers to conform with XHCI 1.0, and all SATA controllers to conform with AHCI 1.3.

ARM's server ambitions have faced setbacks recently with the collapse of ARM pioneer Calxeda and competition Intel's server-oriented Atom Avoton platform. SBSA could prove an important step toward making these plans come to fruition.
 

Pilum

Member
Aug 27, 2012
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Still think 6950X is going to be more than $999. While the yields are getting better there's still been talk of the die cost being still high. Milking out more money out might be one way of making that up.
Cost shouldn't be much of an issue in this case. The smallest BDW-EP die is probably 10c (smallest HSW-EP die is 8c). With the 14nm shrink, the BDW 10c should be quite a bit smaller than HSW 8c. Most sales will be for 6c/8c, so Intel won't need too many fully functional 10c dies. Even with the 14nm yield problems, this shouldn't be a problem from the manufacturing side. Depending on the die size of BDW-EP 10c, the cost structure may actually improve for Intel. This isn't mainstream desktop, where most of a process shrinks advantage is invested into iGPU.

Of course this doesn't mean Intel won't raise prices for the top HEDT SKU, just that it's unlikely to be due to 14nm manufacturing problems.
 

tenks

Senior member
Apr 26, 2007
287
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I'm sure with the delay, Intel probably decided to put in a 10core since they had more time and they probably could have done so regardless (if they really wanted). I'm sure this makes up for it a bit, remember this was originally supposed to be out right about now, before the delay.
 

jpiniero

Lifer
Oct 1, 2010
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Cost shouldn't be much of an issue in this case. The smallest BDW-EP die is probably 10c (smallest HSW-EP die is 8c). With the 14nm shrink, the BDW 10c should be quite a bit smaller than HSW 8c.

Except there's been talk that Intel's 14 nm still hasn't passed 22 nm in terms of $/transistor. It may not be by that much; hence why they are still moving forward with Broadwell-E/EP instead of delaying it. But you can't say that since the die would be smaller it would be cheaper. Intel can of course simply price things higher to make up the 'difference' (like they did with basically abandoning Broadwell-C and raising the price with the 6700K plus removing the HSF) or add new more expensive products to the lineup. So it would make sense to add a fourth tier for Broadwell-E to make a little more money.
 

cbn

Lifer
Mar 27, 2009
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It might need specialized cooling, removing the heat from that many cores in such a tiny space starts to be a real challenge.

The heat density will be higher, but then again the total heat will be less.

In fact, I wonder if a Hyper 212 Evo (with two fans) could work? Maybe two Noctua fans (worst case scenario)?
 

Zodiark1593

Platinum Member
Oct 21, 2012
2,230
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Probably super easy. 4GHz is pretty much no problem for any of the current HSW-E chips.
Heat density is probably becoming a real issue at this point, unless Intel decides to use something very conductive like a silver solder (which they really should use anyway, especially considering price, but I digress). Perhaps to push up performance, research should be done into more heat-resilient materials (think 250C+).
 

cbn

Lifer
Mar 27, 2009
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Heat density is probably becoming a real issue at this point, unless Intel decides to use something very conductive like a silver solder (which they really should use anyway, especially considering price, but I digress). Perhaps to push up performance, research should be done into more heat-resilient materials (think 250C+).

Skylake (i7 6700k) is getting 4GHz stock clocks with TIM though.

And these LGA 2011-3 socket chips do use solder.
 

crashtech

Lifer
Jan 4, 2013
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I thought we were talking eight cores, nearly double the heat emanating from a not much larger area. I'm pretty sure all the 5960X in this list are under water, with the top score being LN2.
 

cbn

Lifer
Mar 27, 2009
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I thought we were talking eight cores, nearly double the heat emanating from a not much larger area.

Compared to the i7 6700K (which uses TIM), a 4Ghz i7 6900K cpu cores should have roughly the same heat density (assuming voltage and frequency curve is the roughly the same). However, keep in mind i7 6900K will have solder instead of TIM.
 

crashtech

Lifer
Jan 4, 2013
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You are ever the optimist, but there is a reason why these higher core count CPUs generally don't run quite as fast as quads, and that is party because the heat can't get out of the die fast enough. So a good AIO or custom loop become more necessary on the average, but those who can afford one of Intel's latest octacores probably don't need to worry about struggling along with a Hyper 212 Evo anyway.
 

cbn

Lifer
Mar 27, 2009
12,968
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You are ever the optimist, but there is a reason why these higher core count CPUs generally don't run quite as fast as quads, and that is party because the heat can't get out of the die fast enough. So a good AIO or custom loop become more necessary on the average, but those who can afford one of Intel's latest octacores probably don't need to worry about struggling along with a Hyper 212 Evo anyway.

People have used hyper 212 Evo (with one fan) with 4.4 Ghz i7 5960X before:

http://www.overclock.net/t/1519272/cooler-master-hyper-212-evo-for-6-core-intel-5820k

I'm not saying that was ideal, but with 14nm and the lower 4Ghz clockspeed two fans on a Hyper 212 Evo should get the job done.

With that mentioned, what excites me most about 14nm is actually overclocking the Broadwell hexcore with a inexpensive cooler like Hyper 212 EVO.
 
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tenks

Senior member
Apr 26, 2007
287
0
0
FUGGER over at XS who dropped info a few months ago about his BDW-E being a nice surprise for him had this to say after the 10c info leaked:


"Broadwell-E will have dual mode FIVR LVR
non linear droop control
lower vcore -10%
more efficient than HW-E
3DL modules moved under die
10%~15% improvement in performance
14nm = smaller die
very aggressive power management
SL-E hopefully will not have FIVR
I hope we get to 5Ghz on retail BW-E chips "
 
Last edited:
Mar 10, 2006
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FUGGER over at XS who dropped info a few months ago about his BDW-E being a nice surprise for him had this to say after the 10c info leaked:


"Broadwell-E will have dual mode FIVR LVR
non linear droop control
lower vcore -10%
more efficient than HW-E
3DL modules moved under die
10%~15% improvement in performance
14nm = smaller die
very aggressive power management
SL-E hopefully will not have FIVR
I hope we get to 5Ghz on retail BW-E chips "

Sexy. Sorry to break it to you though, but Skylake-EP has FIVR, which means Skylake-E probably has it too.
 
Aug 11, 2008
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Granted, they are soldered, but anything close to 5ghz on BW-E seems quite optimistic. If I recall the quads usually only managed around 4.2, lower than both Haswell and Skylake. Of course they did have a big igp and e-dram, which the E series chips dont.
 

crashtech

Lifer
Jan 4, 2013
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@cbn, The forum link you provide isn't terribly convincing. A link to a test site with benchmarks might actually give some weight to your argument. How many high-end chips have you overclocked? Even quads put out a tremendous amount of heat when going for max clocks. An octacore that overclocks well with a 212 Evo is probably a golden chip being wasted on a skinflint fool.
 
Mar 10, 2006
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Granted, they are soldered, but anything close to 5ghz on BW-E seems quite optimistic. If I recall the quads usually only managed around 4.2, lower than both Haswell and Skylake. Of course they did have a big igp and e-dram, which the E series chips dont.

The quads were mobile-focused chips with eDRAM. These are completely different designs.
 
Aug 11, 2008
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The quads were mobile-focused chips with eDRAM. These are completely different designs.

How so? It is the same process and basic architecture is it not? I have no idea how BW-E will overclock, but I am basing my estimate on the fact that since Sandy Bridge pretty much everything has required an extremely golden chip and heroic measures to reach 5ghz. And even despite all the golden memories of SB, I dont think the majority of those actually hit 5 ghz either.
 

cbn

Lifer
Mar 27, 2009
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Even quads put out a tremendous amount of heat when going for max clocks. An octacore that overclocks well with a 212 Evo is probably a golden chip being wasted on a skinflint fool.

But you are only asking for 4 Ghz (not max clocks) and the EVO is rated at 180W TDP (with the single stock fan).
 
Mar 10, 2006
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How so? It is the same process and basic architecture is it not? I have no idea how BW-E will overclock, but I am basing my estimate on the fact that since Sandy Bridge pretty much everything has required an extremely golden chip and heroic measures to reach 5ghz. And even despite all the golden memories of SB, I dont think the majority of those actually hit 5 ghz either.

Same architecture, but I'd bet you that the implementation of BDW-E at the transistor level is different from the implementation of BDW-C. BDW-C was not at all optimized for desktop use; Intel themselves had never even planned to release socketed desktop oriented SKUs (something that Charlie D @ SemiAccurate nailed well in advance, btw) and only stuck a Broadwell-H into an LGA package at the last minute.

I suspect that BDW-E/EP was implemented using relatively high performance (i.e. drive current) transistors but at higher leakage. In contrast, for a chip that is designed to go into a battery-powered laptop, leaky-but-higher-performing transistors aren't ideal.
 
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