Intel Cannonlake 10 nm delayed, introducing KabyLake

[frozentundra123456]

Iris Pro 6200 was barely beating R7 240 DDR3. I highly doubt its "close" nvm faster than R7-250.

It's amazing how with this 14nm and eDRAM and all we got is 20% gain over the competition that has none of that and 1/10th the budget.*

*What it really tells me is that we are at a plateau of gains, and we need all that "fantastic" technology to get the meagre gains we are getting. If we use the tree analogy, now they are using 15m ladders get the few fruits that are left.

We are talking about R7 250 here, not 250x. R7 250 has only 384 shaders vs 320 for R7 240, so it will be barely faster. And according to the review at Toms hardware, HD6200 is almost twice as fast at the 240. So even if you allow for toms trying to show iris in a good light, you are way off base and I stand by what I said.

Now do I think that is great performance? Not really considering it is a very expensive part that was supposed to bring Gen 8 improvements and is taking a huge part of the die area. But let keep the facts straight here.

 

[jpiniero]

I understand that you think that Kabylake( aka skylake 2.0) is evidence that Cannonlake is delayed, but that's not necessarily the case. As I also already said, even an early 2017 launch puts it 15-18+ months after skylake. Its easy to see why Intel would want something to plug that gap.

The original plan seems like it was a small Skylake Refresh to tide things over. With Cannonlake's delay I guess they wanted to do something more substantial in 2016.

 

[cbn]

All the real estate dedicated to the graphics areas could be used to add more cores. So - just guesswork here - instead of a 4C X-Lake which includes graphics - we would have an 8C, overclockable, no graphics space on die.

Xeon-D fits in the same die area as a quad core + GT3.

Xeon-D (Broadwell octocore, 12MB cache, 24 PCIe 3.0 lanes, two 10 GbE LAN, etc): 160mm2
i7-5775 (Broadwell quad core + GT3, 6MB cache, 16 PCIe 3.0 lanes): 169mm2

So Intel could easily make what you are describing happen if they wanted to.

P.S. Regarding Broadwell core sizes, I did measurements here ----> http://forums.anandtech.com/showthread.php?t=2433600

 

[cbn]

I'm not understanding why Intel would do this. Why not make a Skylake chip that even had the 4C but without the graphics space on the die? I must not be able to understand the technical complexity behind the way these chips are designed. It seems cheaper to me to offer 4C or 6C chips with no die space dedicated to graphics, which is completely wasted on those with dedicated graphics cards in home PCs.

Its not cheaper. Hardly anyone would buy the product you describe. Its simply cheaper to sell you a 4C with IGP than a 4C without.

A 4C without IGP would need a new die, new mask, validation etc. It would require a miracle just to pay that back.

And again, what dod you expect to get? Cheaper CPUs? Thats not going to happen with the miniscule volume. Also if you want to overclock, the IGP, disabled or not is for your benefit.

A 4C would at least need a small iGPU.

A few questions I have:

1. How small can Intel go on the iGPU while still meeting needs for UI acceleration (with flash heavy websites, etc)? At low power? At 1440p? At 4K? With DPI scaling factored in?

2.) How does the power management of such a small iGPU 4C chip compare to the same processor with Nvidia Optimus? vs. chip GT3e/GT4e?

 

[DrMrLordX]

1500+ balls for a 4.5W chip ???

You gotta admit, that chip has balls.

*cough*

Boo on the delays, though. Booooo!

 

[witeken]

Intel will talk 10nm at the Investor Meeting.

But yeah it doesn't look good, we've only had news about 10nn being delayed.

 

[tenks]

Looks like I'm going to pass on Skylake-E then!



KABY-E FTW!!?

 

[dark zero]

Intel won't use HBM, they have their own standard in HMC.

They will eventually do... In order to beat nVIDIA in everything, they will do.

 

[Arachnotronic]

Looks like I'm going to pass on Skylake-E then!



KABY-E FTW!!?

I don't think there will be a Kabylake-E. I think Kabylake will have Skylake CPU core + Gen10 GPU if mikk's driver digging is correct.

By the 2018 timeframe 10nm yields should be good enough for a Cannonlake-E.

 

[ehume]

HMC = hybrid memory cube?

 

[ShintaiDK]

HMC = hybrid memory cube?

Correct. Already used in the Xeon Phi product Knights Landing.

 

[Nothingness]

Correct. Already used in the Xeon Phi product Knights Landing.

Note that Intel and Micron changed the interface for KL, and so it seems this is not really standard HMC.

http://www.anandtech.com/show/8217/intels-knights-landing-coprocessor-detailed

For Knights Landing, Intel and Micron will be using a variant of HMC designed just for Intel’s processor. Called Multi-Channel DRAM (MCDRAM), Intel and Micron have taken HMC and replaced the standard memory interface with a custom interface better suited for Knights Landing. The end result is a memory technology that can scale up to 16GB of RAM while offering up to 500GB/sec of memory bandwidth (nearly 50% more than Knights Corner’s GDDR5), with Micron providing the MCDRAM modules. Given all of Intel’s options for the 2015 time frame, the use of a stacked DRAM technology is among the most logical and certainly most expected (we've already seen NVIDIA plan to follow the same route with Pascal); however the use of a proprietary technology instead of HMC for Knights Landing comes as a surprise.

 

[Ajay]

Note that Intel and Micron changed the interface for KL, and so it seems this is not really standard HMC.

http://www.anandtech.com/show/8217/intels-knights-landing-coprocessor-detailed

Cool! Makes sense too!

 

[polarmystery]

If it hasn't already been said...it will eventually (soon) come to a point where the UV mask & feature size are so small that using photo lithography to create the wafers and quantum-tunneling effects from the transistors at such a small gate size will cause the industry to re-think the entire process.

If I was a betting man, this is just the first portion of the eventual slow down of the Tic-Toc mantra

 

[tenks]

I don't think there will be a Kabylake-E. I think Kabylake will have Skylake CPU core + Gen10 GPU if mikk's driver digging is correct.

By the 2018 timeframe 10nm yields should be good enough for a Cannonlake-E.

It was a joke, hence the

Everytime a new core comes out I look ahead to that -E, as do a lot of people.

 

[Fjodor2001]

I just noticed this in the table above:

S-processor line (SRV/WS), LGA1151, 4 cores, GT0.

IIRC, GT0 means no iGPU. So does this mean Intel will introduce Socket 1151 SKUs without iGPU for Kaby Lake? In that case it's the first time we've seen iGPU-less SKUs on desktop socket for some time from Intel.

 

[jpiniero]

IIRC, GT0 means no iGPU. So does this mean Intel will introduce Socket 1151 SKUs without iGPU for Kaby Lake? In that case it's the first time we've seen iGPU-less SKUs on desktop socket for some time from Intel.

Intel sells many Haswell Xeon E3 without the IGP. It's probably just a 4+2 model with the IGP disabled.

 

[ShintaiDK]

Intel sells many Haswell Xeon E3 without the IGP. It's probably just a 4+2 model with the IGP disabled.

^^ This.

 

[Fjodor2001]

Intel sells many Haswell Xeon E3 without the IGP. It's probably just a 4+2 model with the IGP disabled.

Yeah, I guess you're right. I forgot about the Xeons on mainstream desktop socket, probably because most Xeons are on other sockets.

 

[ehume]

Intel sells many Haswell Xeon E3 without the IGP. It's probably just a 4+2 model with the IGP disabled.

. . . because it didn't pass muster. Thrifty, that Intel . . .

 

[Shehriazad]

I feel like the deeper we go toward and into single digit size....the slower stuff will advance. At least until they start using a more suitable material.

I won't guess what that is...since I'm no super professional...they'll figure it out, somehow.

Anyway, let's see how Kabylake is gonna do then, aye? Also interested in the iGPU since Intel seems to be catching up quite nicely in that area, if it's capable enough to play on a serious level. (The actual low end dGPUs and up)


Although a bit off-topic, doesn't this "delay" in theory at least open up a tiny bit of breathing room for the possibly (yea, possibly) upcoming Zen chips?

 

[dark zero]

I feel like the deeper we go toward and into single digit size....the slower stuff will advance. At least until they start using a more suitable material.

I won't guess what that is...since I'm no super professional...they'll figure it out, somehow.

Anyway, let's see how Kabylake is gonna do then, aye? Also interested in the iGPU since Intel seems to be catching up quite nicely in that area, if it's capable enough to play on a serious level. (The actual low end dGPUs and up)


Although a bit off-topic, doesn't this "delay" in theory at least open up a tiny bit of breathing room for the possibly (yea, possibly) upcoming Zen chips?

Zen Chips with HBM should be capable to reach Mid Tier GPU. The problem is that if the CPU is enough capable to maintain that GPU power.

BTW... it's me or Intel is following AMD's path by recycling their CPU and using a new GPU?
Is Kabylake the Godavari of Intel?

 

[Fjodor2001]

Zen Chips with HBM should be capable to reach Mid Tier GPU. The problem is that if the CPU is enough capable to maintain that GPU power.

Good question. But assuming the info that has been presented on Zen so far is correct, it should have sufficient performance for that I think. That is assuming Zen APUs will be at least 4 cores at around IB/H performance level.

BTW... it's me or Intel is following AMD's path by recycling their CPU and using a new GPU?
Is Kabylake the Godavari of Intel?

Maybe it's a new release policy? Tick-Tock(CPU)-Tock(GPU)-Tick-- ...

But then where does e.g. Haswell Refresh fit into that? :hmm:

I think it's not so easy to put the Intel CPU releases into the traditional Tick-Tock model these days. I also wonder if these mid-releases are according to plan, or if they've just been created ad-hoc in panic to fill holes in the release schedule that the delays of the originally intended main releases is causing. One time they create a new mid-release based on higher frequency binned CPUs (Haswell Refresh), another time by adding a different iGPU (Kaby Lake). A bit random it seems, no common pattern.

 

[jpiniero]

It's definitely filling in holes because of the delays. I guess the decision to delay 10 nm was made early enough that there was enough time to backport Cannonlake's GPU back to 14 nm to give Kabylake something new, which was not the case with Haswell/Haswell Refresh.

You know, Intel could have given Broadwell a full burn and then released Skylake next year if they thought 10 nm wasn't happening until mid/late 2017. They really want to push wireless charging with the Windows 10 release though and get DDR4 out there.

 

[TechFan1]

The desktop refreshes with few to no LGA for broadwell and cannonlake were planned a while ago I think, or at least there were rumors. Only one I could find after a bit of searching was this:
http://semiaccurate.com/2012/11/26/intel-kills-off-the-desktop-pcs-go-with-it/