Discussion Intel current and future Lakes & Rapids thread

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jpiniero

Lifer
Oct 1, 2010
14,823
5,441
136
Broadwell-S definitely existed, but was cancelled and replaced with Haswell Refresh. Broadwell-C was a preminum model that was also meant to be available. So in 2015 they originally intended to only release Broadwell-C that year for desktop but the yields weren't good enough for a chip that big... so they ended up pulling in Skylake-S since it was ready. Even then, the 6700K was unavailable for months.
 

DrMrLordX

Lifer
Apr 27, 2000
21,791
11,133
136
So here we go again, another negating 10nm desktop posting. The track record is so terrible in this thread, it's safe to assume you are plain wrong.

What track record?

If there is ADL-S with a completely new socket

"If"; furthermore, Intel may launch LGA1700 for Rocket Lake-S and make Alder Lake-S compatible with it, then do a token release (ala Cannonlake) just to save face in front of the investors.

you can be sure we will see real desktop CPUs and once again NUC devices are using mobile CPU variants, U or H models and they won't use LGA 1700.

The -R designation is for 65W and up, desktop/NUC BGA with. See Haswell-R and Broadwell-R. The -C designation is for an -R CPU that has been adapted to LGA. See Broadwell-C. Note that the -R and -C CPUs previously had eDRAM caches; in this case, we may see Alder Lake-R for BGA and Alder Lake-S for desktop, if that's the path they choose.

And BDW-C was an exotic mobile-H

Wrong, it was Broadwell-R in LGA rather than BGA. Not a mobile part.
 

Ajay

Lifer
Jan 8, 2001
16,078
8,104
136
The rumors did specifically mention 8 cores max for Rocket Lake. That doesn't mean that is Willow Cove since they could just not have an i9 branded product; but does make it more likely.
Also there is no Rocket Lake-H apparently, since 35+ W U parts are replacing them. Again that sort of points to Willow Cove.

I think Intel could get away with Skylake but they would lose DIY for sure.
I agree. Intel has no where to go after CML, so RKL has to be some variant of a Willow Cove backport, IMO. Intel just needs the right combination of clocks and IPC to get back the ST crown they will almost certainly lose to Zen3. Boosting 1 or 2 cores to 4.7 GHz+ shouldn’t be a problem for Intel unless Intel gets the implementation wrong in some critical path. RKL's success will come down to execution, execution and execution. In Intel’s favor, is an incredibly deep knowledge of their 14 nm process.


And, just for reference, the DIY market is small compared to OEM gaming system volume. The guys at Hardware Unboxed noted that Intel rules at the $2500+ price point. 15 years of gaming dominance and a massive prolonged marketing campaign cannot be undone in a few short years. So Intel isn’t dead yet (though I think it will be close to dead mindshare-wise in DIY by 2021 - ala the K8 and x2 days).
 

Richie Rich

Senior member
Jul 28, 2019
470
229
76
OK, better margins.That's what I meant. If Apple has such a large share of such a large market, then why would they bother scaling up and attacking a new market? Isn't that what you're trying to say? Why should x86 be so worried? Perhaps the biggest question though, is why do you turn any thread you can into an ARM/Apple vs x86 thread. It's annoying.
You had no clue that the smartphone market is 7x bigger than server, you were lying that servers are more lucrative. Annoyed? Instead, you should be ashamed, all other people here are annoyed with your misinformation.

That +82% IPC advantage of A13 Lightning core is important in context of maximal IPC still available for development of future Intel uarchs (in terms of scalar computation).
  • Ice Lake (Sunny Cove) decreased Apple's advatage to +54%,
  • Willow Cove to +43% (assuming +8% IPC over Sunny Cove)
  • Golden Cove somewhere to +19% (assuming +20% IPC over Willow Cove)
  • Ocean Cove 2022 might finally reach Apple's IPC.
This unveils Intel's 4 years deficit in development. Everyone knows this is result of Intel's extra long SkyLake period, almost six years they were sitting still (2015 - 2020). Same deficit have also generic ARM Cortex cores (A77 IPC is inbetween KBL and ICL) however bringing bigger IPC jumps every year than x86. This is future serious thread for Intel, especially when being squeezed also from AMD.

However Intel has Jim Keller since 2019 so we can expect some nice surprise in 2023. He can finish what he started in AMD - two CPUs (x86 and ARM) based on one shared high performance RISC core.


Stock? Base/boost oscillating around 4 GHz @ 125W TDP for an 8c part. Where exactly the base and boost will be is unknown to me, but my guess is all-core clocks will sit around 4 GHz. And I think you're far too optimistic about how far ahead Willow Cove is/will be versus Zen3/Vermeer. Willow Cove will probably see the biggest lead in integer workloads (ironically). Overall, 3% lead for Rocket Lake-S per clock at best. And I have my doubts about that.
I agree, 4 GHz all core MT load is reasonable due to TDP limitation. However boost clock for ST might be much higher thanks to reliable 14nm+++ process and lower heat density.

Rocket Lake @4.4 GHz is equal to KBL 5.3 GHz (assuming +20% IPC). Any lower boost clocks than 4.6 Ghz doesn't make sense to me. Intel wouldn't bother with backport. IMHO we can expect ST boost clocks around 4.8 GHz. This will be faster than Zen3 in gaming. And RocketLake @5 GHz would be king in its own class (8c gaming CPU). IMHO that's enough to bridge the waiting time for the Golden Cove in 2021 at 7nm EUV.
 
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DrMrLordX

Lifer
Apr 27, 2000
21,791
11,133
136
IMHO we can expect ST boost clocks around 4.8 GHz. This will be faster than Zen3 in gaming.

ST boost clocks on one core doesn't count for much when most games now are taxing 8 cores. Unless you're playing Starcraft 2. Sure looks nice in SuperPi though. I don't think it'll hit 4.8 GHz reliably in games.
 

mikk

Diamond Member
May 15, 2012
4,168
2,205
136
Broadwell-S definitely existed, but was cancelled and replaced with Haswell Refresh.

It's called market existence, so it never existed. You can be sure the planned BDW-S if it existed on paper (which never came into the market) wouldn't come with edram on board, it's too big and costly.

Wrong, it was Broadwell-R in LGA rather than BGA. Not a mobile part.

Exactly what I said, they just transferred the H-version onto LGA to make it work, the chips were exactly the same and they could release it for desktop because BDW was backward compatible with LGA 1150. Something they can't probably do for ADL with LGA 1200. If Intel is planning ADL just for a few NUCs you can be sure they would use the mobile part ADL-P rather than ADL-S. Sorry it makes zero sense trying to write down 10nm desktop and ADL-S with a NUC, it's hilarious.
 

Carfax83

Diamond Member
Nov 1, 2010
6,841
1,536
136
This unveils Intel's 4 years deficit in development. Everyone knows this is result of Intel's extra long SkyLake period, almost six years they were sitting still (2015 - 2020). Same deficit have also generic ARM Cortex cores (A77 IPC is inbetween KBL and ICL) however bringing bigger IPC jumps every year than x86. This is future serious thread for Intel, especially when being squeezed also from AMD.

I'm not really that knowledgeable about CPU micro architecture, but it seems disingenuous to compare the IPC gains of the A series to x86-64 over the years. Clock frequencies aside (which makes it harder to increase IPC), x86-64 has much wider SIMD vectors than the A series. Pouring a lot of resources and die area into developing AVX/AVX2/AVX-512 has perhaps come at the expense of increased scalar IPC. But is the trade off worth it?

With more and more applications becoming accelerated by SIMD and multithreading, Intel and AMD (but especially Intel) are seemingly both prioritizing the usage of these technologies in their architectures and supporting them with compilers. And when you see how applications scale with SIMD+multithreading compared to using the scalar path, who could blame them?

As a gamer, I'm seeing CPU based physics reach new heights with effects that used to be only be possible with hardware acceleration, thanks to SIMD and multithreading.
 

IntelUser2000

Elite Member
Oct 14, 2003
8,686
3,785
136
The -R designation is for 65W and up, desktop/NUC BGA with. See Haswell-R and Broadwell-R. The -C designation is for an -R CPU that has been adapted to LGA. See Broadwell-C. Note that the -R and -C CPUs previously had eDRAM caches; in this case, we may see Alder Lake-R for BGA and Alder Lake-S for desktop, if that's the path they choose.

Wrong, it was Broadwell-R in LGA rather than BGA. Not a mobile part.

It's not. The -R chip is a 65W version of the mobile HQ chip. Both have the same FCBGA1364 pin. The -C chip is a LGA version of both.

The datasheet for the 5th Gen core Desktop says this:

On-package Cache Memory integrated within the processor based on Mobile H-Processor line with up to GT3 graphics

That +82% IPC advantage of A13 Lightning core is important in context of maximal IPC still available for development of future Intel uarchs (in terms of scalar computation).

It's not 82%.

Rocket Lake @4.4 GHz is equal to KBL 5.3 GHz (assuming +20% IPC).

If it uses Sunny Cove sure.

Clock frequencies aside (which makes it harder to increase IPC), x86-64 has much wider SIMD vectors than the A series. Pouring a lot of resources and die area into developing AVX/AVX2/AVX-512 has perhaps come at the expense of increased scalar IPC. But is the trade off worth it?

They need to backtrack on the clocks. We went from 4.6GHz with Kabylake to 5GHz using Coffeelake over the span of 3 years. Because 5GHz wasn't supposed to happen, so it requires extraordinary efforts to get there, plus eating up all overclocking headroom. How's that an advancement?

CML won't really reach 5.3GHz, and in reality is a 5.1GHz chip. 5.2GHz is with a lucky core ST frequency, and 5.3GHz is using Thermal Velocity Boost, which is nothing more than a marketing trick and will only get there for few dozens of milliseconds if thermal/power headroom allows it. That's a lot of fine print for practically unrealized gain.

If Rocketlake is 30% faster per core compared to SKL and clocks at just 4GHz, it'll still be an advancement because you'll have overclocking headroom, and its much more realistic to reach 4GHz.
 
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repoman27

Senior member
Dec 17, 2018
378
535
136
You have to prove that RKL-S won't get DMI x8 with CMP-H which is hard to do. Until then you are unable to prove your point. In fact he said CML-S with CMP-H gets only DMI x4 which is accurate. It seems you are really desperate trying to find the tiniest spec just to write down sharkbay. Look this is wrong so he is unreliable in all he said. I won't agree with you because all he said so far has been confirmed later on.
It's not hard to do at all. Look at the datasheet for the chipset. The ballout clearly shows that there are only pins for DMI x4, not DMI x8, therefore DMI x8 isn't possible. You can argue that I can't prove that CMP-H is identical to CNP-H at this juncture, but seeing as there are zero feature changes, identical package dimensions, and the same exact number of balls, it's a pretty safe bet.

Why are you so convinced that CMP-H can support DMI x8 when there is overwhelming evidence to the contrary?
As he told he looked in the wrong table and that's why he corrected it later.
Exactly. Like everyone else, this person is fallible—they occasionally make mistakes. I'm not trying to discredit everything sharkbay says, I'm merely pointing out that there appear to be some other things that sharkbay got wrong which at this point have been widely disseminated.
Memory speeds could change any time. CML-S was specified for DDR-2666 in all slides and leaks until the very end.
Because Intel couldn't guarantee DDR4-2933 until they saw how things binned out, and probably still won't in 2 DPC configurations. But why would you invest in back-porting Willow Cove to 14nm and then saddle it with a 6-year old memory controller design that is being pushed to its limits? Is DDR4-3200 really that hard to achieve on 14nm (honest, not rhetorical question)?
 
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DrMrLordX

Lifer
Apr 27, 2000
21,791
11,133
136

LGA 1200 is (if I recall correctly) a one-off for Comet Lake-S. They probably won't use it for Rocket Lake-S or Alder Lake-whatever.

If Intel is planning ADL just for a few NUCs you can be sure they would use the mobile part ADL-P rather than ADL-S.

Well since your brought it up, that seems logical enough as well. Either way, niche part, limited release, blah blah blah. It'll still give Intel something to trot out in front of investors if they just rename ADL-P or otherwise label it a "desktop" part because it found its way into a NUC.

It's not. The -R chip is a 65W version of the mobile HQ chip. Both have the same FCBGA1364 pin.

It was still a different SKU with a different bin. I don't think Intel designated any 65W parts for mobile (not saying OEMs didn't try it anyway in certain niche products). The Haswell and Broadwell -HQ products topped out at 47W TDP.
 

IntelUser2000

Elite Member
Oct 14, 2003
8,686
3,785
136
But why would you invest in back-porting Willow Cove to 14nm and then saddle it with a 6-year old memory controller design that is being pushed to its limits? Is DDR4-3200 really that hard to achieve on 14nm (honest, not rhetorical question)?

The question I want to ask you guys is

Why does it matter?

It's a desktop part and people will put DDR4-4000 sticks on them.

It was still a different SKU with a different bin. I don't think Intel designated any 65W parts for mobile (not saying OEMs didn't try it anyway in certain niche products). The Haswell and Broadwell -HQ products topped out at 47W TDP.

I don't think so. One thing known for the -C chips is that they were terrible overclockers. You can use higher TDP to reach higher clocks, but you'll eventually run into silicon limits. And despite all that, there were supply issues with the chip.

Mobile might be binned in a way so peak frequency is sacrificed in favor of better efficiency at the lower frequencies. That could mean lower leakage power for lower idle and/or performing better than desktop SKUs at those lower frequency levels.

And, Intel themselves say it, right on the datasheet!

Intel then-client chief Kirk Skaugen said they regretted not having a full Broadwell desktop line. Who knows? 5770K could have been a product.
 

repoman27

Senior member
Dec 17, 2018
378
535
136
LGA 1200 is (if I recall correctly) a one-off for Comet Lake-S. They probably won't use it for Rocket Lake-S or Alder Lake-whatever.
LGA1200 is apparently intended for Comet Lake-S/Rocket Lake-S/Tatlow.

edit: fixed link
The question I want to ask you guys is

Why does it matter?

It's a desktop part and people will put DDR4-4000 sticks on them.
Oh, I only brought it up because people are latching on to specific details from leaks to make the argument that Rocket Lake will be one way or the other. If Rocket Lake and Tiger Lake are both Willow Cove, why does Rocket Lake have a memory controller that clocks lower than Ice Lake? Seems odd, no?
 
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jpiniero

Lifer
Oct 1, 2010
14,823
5,441
136
LGA1200 is apparently intended for Comet Lake-S/Rocket Lake-S/Tatlow.

Oh, I only brought it up because people are latching on to specific details from leaks to make the argument that Rocket Lake will be one way or the other. If Rocket Lake and Tiger Lake are both Willow Cove, why does Rocket Lake have a memory controller that clocks lower than Ice Lake? Seems odd, no?

Cheap out of validation and get people to buy Z boards. The current controller works fine at 3200.
 

repoman27

Senior member
Dec 17, 2018
378
535
136
It's not. The -R chip is a 65W version of the mobile HQ chip. Both have the same FCBGA1364 pin. The -C chip is a LGA version of both.
Yeah, this is sort of why I posted the table with all the dies in it—to illustrate how every client processor SKU Intel has introduced since Aug 2015 was based on one of at most 20 dies. They're just binned, packaged, and marketed differently. It's a little ridiculous to argue whether something is a "real" desktop or mobile chip when they're the same exact die, but one piece of silicon just happened to land differently on the voltage/frequency scaling curve due to normal manufacturing variances.

Cheap out of validation and get people to buy Z boards. The current controller works fine at 3200.
But that only applies to K SKUs. The other 80% of H/S-Series processors are rated for 2666 because Intel would have to scrap too many dies if they raised it. They have to go with the lowest common denominator.
 

jpiniero

Lifer
Oct 1, 2010
14,823
5,441
136
But that only applies to K SKUs. The other 80% of H/S-Series processors are rated for 2666 because Intel would have to scrap too many dies if they raised it. They have to go with the lowest common denominator.

The memory speeds are unlocked if you buy a Z board, and it works just fine on any S processor.
 

repoman27

Senior member
Dec 17, 2018
378
535
136
The memory speeds are unlocked if you buy a Z board, and it works just fine on any S processor.
Intel is currently supply bound. If we take a Coffee Lake HP die as an example, based on how Intel bins them, if the memory controller isn't good for DDR4-2666 2DPC all day long it can only be sold as a lower margin i3/Pentium/Celeron part. If it can't hang at DDR4-2400 it goes in the scrap heap. At least 80% of Coffee Lake HP dies will never be used in conjunction with a Z board, in fact, many of them won't even be sold in LGA packages. They'll be locked in at whatever the validated spec is. Intel needs to set the spec as low as possible to salvage every die they can to alleviate supply pressure, but they can't go too low or they end up penalizing the majority of their customers with lower than necessary memory bandwidth. Even though many Coffee Lake CPUs can support higher memory clocks, they're sold as a DDR4-2666 platform because Intel isn't confident they can make enough dies capable of DDR4-2933 to move the whole product stack up a bin.

This is exactly what we see with Comet Lake S being promised initially as DDR4-2666 with a footnote stating: "Investigating UDIMM 2933 one DIMM per channel (1DPC) support. More details to follow once initial testing on silicon is complete." Intel is right at the edge with their binning and showing their hand.
 
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Zucker2k

Golden Member
Feb 15, 2006
1,810
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So what ? You link to an article, but say nothing about it. Anandtech is the main page for readers here anyway. (well one of)
One can't link to a much anticipated ice lake notebook release in the ice lake thread? Your level of anti Intel hate must be bottomless.



This is your 4th member callout of Markfw, if I didn't know better, I would say you have a vendetta of sorts.


esquared
Anandtech Forum Director
 
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