Discussion Intel current and future Lakes & Rapids thread

[yuri69]

Golden Cove isn't going to have +40% IPC. Keep expectations a bit more grounded.

+40% IPC vs Comet Lake is fully within the expected gains.

Sunny Cove already has 18% over Comet Lake, thus they need to improve by another 18% to get that +40%.

+40% IPC vs the previous Coves? Not likely.

 

[uzzi38]

Golden Cove isn't going to have +40% IPC. Keep expectations a bit more grounded.

Over Skylake?

40% IPC is essentially 2 18% IPC uplifts (1.3925x), which is close enough.

 

[uzzi38]

I would be shocked.

I wouldn't.

Intel needs this sort of jump right now to keep up with both AMD but also Apple's rates of improvement. Neither of them are standing still, and it's only going to get more difficult from here if Nvidia get control of ARM, not to mention Qualcomm's acquisition of Nuvia.

 

[uzzi38]

Looking back & found this slide which was posted few days ago in this thread I realize,

View attachment 39389


I don't know who made this slide but from the info I read it seems he was a bit conservative about ADL's performance, something fishy: the first 10%-20% over TGL is a large range, adding up the gap of RKL lead against SKL/CML(~15%), it could translate to ADL has ~25%-35% advantage against SKL/CML, which is pretty conservative compare to rumored ~40%.
Best scenario if the final RKL has 20% average lead to CML, adding up and still a floating range of 30%-40% for a gap between ADL to CML.

As for the leak about ADL's perf it's sad that we always saw something like Geekbench which has so many unstable factor, I don't understand why those leakers addicted to GB lol.

You don't know who's slide that is?

It's plastered everywhere on the slide...

And as per usual, it's best to disregard MLID.

 

[Hulk]

I'm really wondering how wide these CPU's can get? You know they know based on simulations. I mean of course you can go as wide as you want, but I'm talking about the performance return they are getting from the additional transistors added to these already high optimized processors.

I found this very interesting. From the Colwell oral history. It's a really great read if you haven't checked it out.

Page 99-100 - http://newsletter.sigmicro.org/sigmicro-oral-history-transcripts/Bob-Colwell-Transcript.pdf

"Writing such a code analysis tool turned out to be easy to do: it took Dave and me about two weeks to write this code and then Glen later added a graphical interface, so it looked better, you can make better sense of its results. In effect Dave wrote an entire x86 microcode suite in a just a few days, and while it did not have to be totally accurate, it had to be pretty close and there is nobody better doing something like that than he was, he knocked that thing out so fast. Anyway we got this tool working and then we could do things with it. For instance, we wanted to know, if you had an infinite number of ALUs but nothing else changes in the machine, how fast would the code run. I call that exploring the rim of the Robert P. Colwell oral history 100 of 164 universe, you can tell the tool all of the machine assumptions you wanted to make and you would find that you will bottleneck for some other reason. What that tool was teaching us was that if you remove this bottleneck then a new, preferably smaller bottleneck suddenly pops up behind that you didn't see until now, and then you'd look and ask what if I get rid of him too?

Pretty soon you start getting a feel for what’s important in this machine for the type of code you’re analyzing. Then you start backing away from the universe’s rim and tell the tool I do not really have a billion ALUs, let's suppose I have 6, or suppose I have 4, numbers that you can almost actually hit, nowadays of course you can do far better than this but back then it was like you can do 2, Pentium did that, but we think, we can do 3, maybe we can do 4, you know, numbers like that, so you could intensively pick on possible machine architectures using real code. The DFA analyzer would tell you if you do not screw this up in the implementation this is the kind of parallelism you'll get out of it, and so the cool thing was within a few months we were pretty confident that all that stuff that the RISC researchers were saying would also apply to us. There didn't seem to be anything in the x86 architecture that would prevent it. And that was really valuable information to us."

 

[Exist50]

+40% IPC vs Comet Lake is fully within the expected gains.

Sunny Cove already has 18% over Comet Lake, thus they need to improve by another 18% to get that +40%.

+40% IPC vs the previous Coves? Not likely.

Yes, pardon, missed the context. Was thinking vs Sunny Cove. +40% vs Skylake is within the realm of reason.

 

[mikk]

Assuming it was running with 3.5 Ghz it's roughly a 25% IPC increase in the integer score compared to Willow Cove. The last Intel tock like releases were within 10-20%.

 

[Hulk]

I wouldn't.

Intel needs this sort of jump right now to keep up with both AMD but also Apple's rates of improvement. Neither of them are standing still, and it's only going to get more difficult from here if Nvidia get control of ARM, not to mention Qualcomm's acquisition of Nuvia.

What they need and the reality of what will happen are two different things.

I'm not convinced that Sunny Cove will show an average 18% IPC increase over Skylake. I know that's what Intel says but documentation is poor and I can find no representative group of benchmarks, clock speed equalized to substantiate their claim. In fact, as Ian has stated many times Intel has been diabolical (my word, he actually wrote "dystopian nightmare" if I remember correctly) in making apples-to-apples comparisons across later core generations, namely Skylake to Sunny Cove to Willow Cove nearly impossible. With clock speeds constantly moving and nobody taking the care to record Average Effective Clock using HWinfo during benchmarking IPC comparisons remain dubious.

The one set of benchmarks I have some faith in are the Handbrake benchmark in this forum which does include Average Effective Clock. In those tests with what I consider valid clocks Zen 3 is 30%+ faster than Skylake. In full disclosure I have been updating that table but the numbers I'm quoting were submitted, not generated by me. Furthermore, based on those Handbrake scores even Tiger Lake is 10% behind Zen 3 in terms of IPC in Handbrake encoding. As we all know the real target for Intel is Zen 3.

As I have written many times before I have no dog in this fight but I don't think ADL will show 40% IPC over Skylake. Maybe 30%. But I do hope I'm wrong. It's just that since P4 to Conroe no Intel generation-to-generation uplift has been more than 15% IPC, and even that was really only Sandy Bridge which made such a jump.

 

[Carfax83]

It's just that since P4 to Conroe no Intel generation-to-generation uplift has been more than 15% IPC, and even that was really only Sandy Bridge which made such a jump.

That was likely due to lack of competition. Intel had such a huge lead over AMD during those times in both IPC and performance per watt, they didn't need to release cores with larger IPC gains to compete so they became apathetic. That combined with their disastrous 10nm rollout led them to their current predicament. When AMD released the original Zen core in 2017, it had a massive 52% IPC gain over the previous Excavator cores, and that basically brought them up to parity with Intel's Haswell cores, which was released in 2013. So even with that huge gain, they were still behind Skylake in terms of IPC. That's how far behind the curve AMD was.

If Intel had executed well on their 10nm node, they would be on 7nm++ by now and I would have an Ocean Cove based CPU

 

[lobz]

Golden Cove isn't going to have +40% IPC. Keep expectations a bit more grounded.

Edit: Misread. Thought that was supposed to be over Sunny Cove.

Welcome to the club

 

[RTX2080]

A leaker who leaked QS11900K before made a very long analysis and said some Z490 mobos are very likely cannot support 11gen Rocketlake due to technical limitation:

旧帖归档 - Chiphell - 分享与交流用户体验

旧帖归档Chiphell - 分享与交流用户体验 ,Chiphell - 分享与交流用户体验

translate.google.com

these mobos below are in the unlucky list:

MSI Z490 S01
MSI Z490M S01
ASRock Z490 Phantom Gaming 4 (including all expansion models)
ASRock Z490 Pro4
ASRock Z490M Pro4
ASRock Z490M-ITX/ac

 

[uzzi38]

A leaker who leaked QS11900K before made a very long analysis and said some Z490 mobos are very likely cannot support 11gen Rocketlake due to technical limitation:

旧帖归档 - Chiphell - 分享与交流用户体验

旧帖归档Chiphell - 分享与交流用户体验 ,Chiphell - 分享与交流用户体验

translate.google.com

these mobos below are in the unlucky list:

MSI Z490 S01
MSI Z490M S01
ASRock Z490 Phantom Gaming 4 (including all expansion models)
ASRock Z490 Pro4
ASRock Z490M Pro4
ASRock Z490M-ITX/ac

You've got to be kidding me...

 

[Dave2150]

You've got to be kidding me...

Not really a surprise. The more expensive motherboards (ASUS in particular) are always the boards with the best components, compatibility. MSI, Asrock are known for skimping on the lower models and going for the bare minimum.

 

[uzzi38]

Not really a surprise. The more expensive motherboards (ASUS in particular) are always the boards with the best components, compatibility. MSI, Asrock are known for skimping on the lower models and going for the bare minimum.

Which is why I have to question why Intel's minimum spec for Z490 isn't able to support RKL.

 

[Zucker2k]

The one set of benchmarks I have some faith in are the Handbrake benchmark in this forum which does include Average Effective Clock. In those tests with what I consider valid clocks Zen 3 is 30%+ faster than Skylake. In full disclosure I have been updating that table but the numbers I'm quoting were submitted, not generated by me. Furthermore, based on those Handbrake scores even Tiger Lake is 10% behind Zen 3 in terms of IPC in Handbrake encoding. As we all know the real target for Intel is Zen 3.

In INT, FP, or SIMD?
I'm yet to see a Tiger Lake desktop processor. Plus, handbrake is suddenly the go-to app for determining ipc? What are the file sizes being used? What profile? Also, clock normalized ipc tests are so disingenous, it's no longer funny.

 

[JoeRambo]

That was likely due to lack of competition. Intel had such a huge lead over AMD during those times in both IPC and performance per watt, they didn't need to release cores with larger IPC gains to compete so they became apathetic. That combined with their disastrous 10nm rollout led them to their current predicament. When AMD released the original Zen core in 2017, it had a massive 52% IPC gain over the previous Excavator cores, and that basically brought them up to parity with Intel's Haswell cores, which was released in 2013. So even with that huge gain, they were still behind Skylake in terms of IPC. That's how far behind the curve AMD was.

What also needs to be considered is that Golden Cove is first "Tock" since Sunny Cove, which was designed in ~2015-16, before AMD ZEN era. Willow Cove(TGL) barely touched uncore, so Intel had at least 3+ years to design properly advanced core for 10nm process and during those years Zen bells rang instilling urgency\3. I'd say anything in 35-50% IPC gain over Skylake department is possible. Sunny Cove and ZEN3 are iterations on earlier designs and show 20% more IPC over Skylake, so it might be possible for Intel to extract additional 20-25% IPC increase from 4 years of research and advancements.

 

[Hulk]

In INT, FP, or SIMD?
I'm yet to see a Tiger Lake desktop processor. Plus, handbrake is suddenly the go-to app for determining ipc? What are the file sizes being used? What profile? Also, clock normalized ipc tests are so disingenous, it's no longer funny.

You should have a look at the current thread. The data is interesting.

Yes, there are TGL in the list.
File link is in the thread.
Profile is in the thread.
Yes, normalizing clock but using Average Effective Clock from HWinfo, which is the best we have or actual clock during the run.

I'm not sure if you are referring to me as being disingenuous because I have no ulterior motive to show one processor is better than the other, which is what the word would mean in this context. Perhaps others are doing that with clock normalized benchmarks. I'm simply taking the best data available to me and presenting it for others to evaluate and analyze. Basing the normalized values on HWinfo's Average Effective Clock seems better than watching a wildly fluctuating clock speed readout and guessing at an average.

 

[Hulk]

Let's have a look at this.

Dell Inc. OptiPlex 7480 AIO vs Dell Inc. XPS 13 7390 2-in-1 - Geekbench

Both Dell systems. Ice Lake 1065G7 vs 10600
3.9GHz vs 4.8GHz

I normalized the Ice Lake scores to 4.8GHz, which of course gives Ice Lake the advantage of perfect scaling. Bear with me Zucker2k...please

Then I computed the percent increase from Comet to Ice Lake for each subscore and averaged those.

With the AES-TXT subscore, 26.5% IPC increase for Sunny Cove vs Skylake
That's pretty huge.

Without the AES-TXT subscore, 18.2% IPC increase for Sunny Cove vs Skylake.
Still quite impressive actually.

Sunny Cove is showing better than I had thought.

The 18.2% is actually interesting because it compares quite well with the Intel 19% estimate we have seen. If you add in a less weighted AES-TXT score 19% is quite believable. Also Intel can basically take a bunch of benches and then weight the AES tests appropriately to achieve their quoted 19%. Not that I don't think it's a valid number, but they can "reverse engineer" it a bit.

So I have changed my previous position slightly. I think RKL will show 19% average IPC increase over Comet Lake. But I am dubious as to ADL pulling another 21% IPC increase over RKL. I'm thinking 15% is a better bet.

My quick Excel work below.

Also I read that the overall Geekbench score was computed from the geomean of the subscores. I couldn't get their number using the Excel geomean function. I even double checked it doing the raw math in Excel, multiplying the numbers then taking the 1/21 root of that number. Same number as Excel's geomean value (of course) but always a little less than the Geekbench number reported for that particular set of subscores. Perhaps they are doing some internal weighting or something? That's why I decided to go with a subscore-to-subscore comparison and then average those results into a final number. I can sink my teeth better into that comparison.

1351​	1662.769​	1290​	0.288968​
1065G7		10600
3979​	4897.231​	1673​	2.927215​
1058​	1302.154​	1314​	0.990985​
1324​	1629.538​	1419​	1.148371​
982​	1208.615​	1037​	1.165492​
1140​	1403.077​	1161​	1.208507​
1132​	1393.231​	1162​	1.198994​
1217​	1497.846​	1213​	1.234828​
1216​	1496.615​	1202​	1.245104​
1149​	1414.154​	1238​	1.142289​
1149​	1414.154​	1156​	1.223316​
1300​	1600​	1312​	1.219512​
1216​	1496.615​	1300​	1.151243​
1190​	1464.615​	1182​	1.239099​
1226​	1508.923​	1175​	1.28419​
1033​	1271.385​	1181​	1.076532​
2072​	2550.154​	2285​	1.116041​
2264​	2786.462​	2396​	1.162964​
1611​	1982.769​	1602​	1.237684​
1087​	1337.846​	1150​	1.163344​
1167​	1436.308​	1390​	1.033315​
1223​	1505.231​	1071​	1.405444​
	1634.25​	1327.344​	1.265451​
		0.231218​
			1.182363​

 

[mikk]

You should have a look at the current thread. The data is interesting.

Yes, there are TGL in the list.
File link is in the thread.
Profile is in the thread.
Yes, normalizing clock but using Average Effective Clock from HWinfo, which is the best we have or actual clock during the run.

Keep in mind we have only TGL-U results and AVX512 has been disabled by default on TGL for this x265 version (you did remove the separate AVX512 table). Usually the ULV versions have a lower IPC because the uncore can be clocked lower, much worse RAM timings and things like this.

 

[Hulk]

Keep in mind we have only TGL-U results and AVX512 has been disabled by default on TGL for this x265 version (you did remove the separate AVX512 table). Usually the ULV versions have a lower IPC because the uncore can be clocked lower, much worse RAM timings and things like this.

Very good points.

 

[Zucker2k]

Very good points.

That's what I alluded to when I asked about a "Tiger Lake Desktop" chip. You're comparing a desktop processor against an 'ultra' mobile chip. Maybe try mobile vs mobile for a fair comparison?

 

[nerp]

You've got to be kidding me...

Makes perfect sense. ASRock cheaped out on their z490 boards and they struggle even to run the i9-10900k at stock. They were widely panned upon release and it's no surprise their garbage boards can't run RL. There's a reason ASRock has a reputation for making poo products. Cheapy cheapy crap.

 

[Hulk]

That's what I alluded to when I asked about a "Tiger Lake Desktop" chip. You're comparing a desktop processor against an 'ultra' mobile chip. Maybe try mobile vs mobile for a fair comparison?

Okay yes. I understand. Thanks for pointing me in the right direction.

Sunny Cove 1065G7 vs Whiskey Lake (Skylake) 8265u
Both *should* single core turbo up to 3.9GHz meaning no clock normalizing required.

LENOVO 81RS vs LENOVO 81RS - Geekbench

I sorted scores to find the fastest for each CPU. Neither score is an outlier, there are plenty of other comparable scores almost as fast.

Lowest IPC delta is obtained by performing excel geomean calc of the sub scores in Excel without AVC-TXT - 16.9% increase for Sunny Cove
Highest IPC delta is obtained using Geekbench overall score with AVC-TXT sub score - 28.8% increase for Sunny Cove

I think the objective reality across a broad range of applications lies between 16.9% and 28.8%.

Intel is calling it 19% and based on this one analysis that seems extremely reasonable.

With AVC-TXT
Geomean IPC delta	22.8%​
Geekbench 5 IPC delta	28.8%​
Percent calc. IPC delta	27.0%​
Without AVC-TXT
Geomean IPC delta	16.9%​
Percent calc. IPC delta	17.1%​

Spreadsheet calcs.

	8265u	1067G7	Percent		8265u	1067G7	Percent
	1415​	4595​	2.247​
	1086​	1141​	0.051​		1086​	1141​	0.051​
	1108​	1279​	0.154​		1108​	1279​	0.154​
	1074​	1142​	0.063​		1074​	1142​	0.063​
	1145​	1379​	0.204​		1145​	1379​	0.204​
	1105​	1257​	0.138​		1105​	1257​	0.138​
	1076​	1312​	0.219​		1076​	1312​	0.219​
	1091​	1218​	0.116​		1091​	1218​	0.116​
	1117​	1261​	0.129​		1117​	1261​	0.129​
	995​	1227​	0.233​		995​	1227​	0.233​
	1148​	1469​	0.280​		1148​	1469​	0.280​
	1138​	1326​	0.165​		1138​	1326​	0.165​
	962​	1226​	0.274​		962​	1226​	0.274​
	990​	1284​	0.297​		990​	1284​	0.297​
	1016​	1107​	0.090​		1016​	1107​	0.090​
	2096​	2428​	0.158​		2096​	2428​	0.158​
	2179​	2532​	0.162​		2179​	2532​	0.162​
	1426​	1757​	0.232​		1426​	1757​	0.232​
	1049​	1229​	0.172​		1049​	1229​	0.172​
	1106​	1255​	0.135​		1106​	1255​	0.135​
	1084​	1250​	0.153​		1084​	1250​	0.153​
Geomean Excel Calc.	1178​	1446​	0.270​		1167​	1365​	0.171​
GeekBench 5	1149​	1480​
With AVC-TXT
Geomean IPC delta	22.8%​
Geekbench 5 IPC delta	28.8%​
Percent calc. IPC delta	27.0%​
Without AVC-TXT
Geomean IPC delta	16.9%​
Percent calc. IPC delta	17.1%​

 

[Zucker2k]

Sunny Cove 1065G7

Is Tigerlake not Willowcove, 1165G7? I'm saying this knowing very well you're aiming for clock parity.

 

[Hulk]

Is Tigerlake not Willowcove, 1165G7? I'm saying this knowing very well you're aiming for clock parity.

Pretty sure 1065G7 is Sunny Cove (Ice Lake), which is what I wanted to compare to Whiskey Lake (Skylake) to get an idea of Comet Lake (Skylake) to Rocket Lake (Willow Cove, which I believe is Sunny Cove ported to 14nm).

So we're doing mobile Skylake vs mobile Sunny Cove to project relative performance between Comet Lake to Rocket Lake. This way, as you wrote I'm comparing mobile memory subsystem to mobile memory subsystem.

Or I'm not following your question perhaps?

I was trying to not use Tiger Lake since Willow Cove I believe is really Sunny Cove at 14nm.