Discussion Intel current and future Lakes & Rapids thread

[Zucker2k]

Pretty sure 1065G7 is Sunny Cove (Ice Lake), which is what I wanted to compare to Whiskey Lake (Skylake) to get an idea of Comet Lake (Skylake) to Rocket Lake (Willow Cove, which I believe is Sunny Cove ported to 14nm).

So we're doing mobile Skylake vs mobile Sunny Cove to project relative performance between Comet Lake to Rocket Lake. This way, as you wrote I'm comparing mobile memory subsystem to mobile memory subsystem.

Or I'm not following your question perhaps?

I was trying to not use Tiger Lake since Willow Cove I believe is really Sunny Cove at 14nm.

I appreciate your efforts at clarity. My first seeming objection was about your comparison of Tigerlake to Zen 3, which you said lagged 10% behind the latter. It was specifically that comparison i was referring to. Sorry that I didn't highlight that. Kindly forgive me. Still, I find your data enlightening. Thanks.

 

[Hulk]

I appreciate your efforts at clarity. My first seeming objection was about your comparison of Tigerlake to Zen 3, which you said lagged 10% behind the latter. It was specifically that comparison i was referring to. Sorry that I didn't highlight that. Kindly forgive me. Still, I find your data enlightening. Thanks.

You were (are) absolutely correct in the problem of comparing mobile to desktop performance. I knew that but somehow forgot in my rush to do some napkin math.

Based on the last numbers I ran I expect to see 11900k Geekbench 5 single core scores between 1900 and 2000. It's hard to extrapolate because you just can't tell the clockspeed of the processors in the Geekbench 5 database.

As I wrote before it's better than I thought it would be based on my flawed mobile/desktop comparison projections!

 

[Asterox]

This is more or less expected, 7nm is obviously in a heavy knockout.

Beleaguered Intel delays its 7nm chips yet again, now expected in 2022 or 2023

Intel has announced that it's pushing back the release of its 7nm chips yet again, this time until late 2022 or early 2023 after it…

macdailynews.com

 

[AMDK11]

Pretty sure 1065G7 is Sunny Cove (Ice Lake), which is what I wanted to compare to Whiskey Lake (Skylake) to get an idea of Comet Lake (Skylake) to Rocket Lake (Willow Cove, which I believe is Sunny Cove ported to 14nm).

So we're doing mobile Skylake vs mobile Sunny Cove to project relative performance between Comet Lake to Rocket Lake. This way, as you wrote I'm comparing mobile memory subsystem to mobile memory subsystem.

Or I'm not following your question perhaps?

I was trying to not use Tiger Lake since Willow Cove I believe is really Sunny Cove at 14nm.

Rocketlake is CypressCove cores, not WillowCove. WillowCove is a non-inclusive L2 1.25MB and L3 3MB cache.

CypressCove is an exact copy of SunnyCove but in 14nm with 512KB L2 and L3 2MB inclusive cache. Either way, the logic of the x86 WillowCove core is the same as Sunny / CypressCove except with a redesigned cache subsystem.

Besides, everything is fine and thank you for the valuable data

 

[Hitman928]

This is more or less expected, 7nm is obviously in a heavy knockout.

Beleaguered Intel delays its 7nm chips yet again, now expected in 2022 or 2023

Intel has announced that it's pushing back the release of its 7nm chips yet again, this time until late 2022 or early 2023 after it…

macdailynews.com

I'm pretty sure that is old news that someone repackaged as new. It's definitely not from the latest earnings report as the article suggests.

 

[Hulk]

Rocketlake is CypressCove cores, not WillowCove. WillowCove is a non-inclusive L2 1.25MB and L3 3MB cache.

CypressCove is an exact copy of SunnyCove but in 14nm with 512KB L2 and L3 2MB inclusive cache. Either way, the logic of the x86 WillowCove core is the same as Sunny / CypressCove except with a redesigned cache subsystem.

Besides, everything is fine and thank you for the valuable data

Okay I got it right data-wise but confused the names. I know Ice Lake is the same core as Rocket Lake but forgot in Rocket at 14nm it's now Willow Cove! Lots of Lakes and Coves to keep straight.

In Rocket Lake they should have named the core "Sunny Cove-14++++++++++++" to make them easier to keep straight. Without all the +'s of course but I couldn't resist.

 

[Ajay]

This is more or less expected, 7nm is obviously in a heavy knockout.

Beleaguered Intel delays its 7nm chips yet again, now expected in 2022 or 2023

Intel has announced that it's pushing back the release of its 7nm chips yet again, this time until late 2022 or early 2023 after it…

macdailynews.com

Original: Intel earnings report.

 

[AMDK11]

RocketLake = CypressCove(SunnyCove)

 

[Hitman928]

Original: Intel earnings report.

Wrong earnings report.

 

[blckgrffn]

RocketLake = CypressCove(SunnyCove)

If the folks in this thread can’t keep it straight the market at large is doomed to never understand it.

 

[Hulk]

If the folks in this thread can’t keep it straight the market at large is doomed to never understand it.

I agree but I think it's pretty much just me that caused the confusion!
I have it now I think. I'm going to try from memory to test myself.

All of these are Skylake cores and 14nm except for Cannon Lake, which is (failed) 10nm
6th - Skylake>7th - Kaby Lake (Skylake) - 8th (this is the tough one) - Kaby Lake R (mobile), Coffee Lake (desktop/mobile), Whiskey Lake U/Amber Lake Y(mobile), Cannon Lake (I think?)>9th - Coffee Lake R (desktop/mobile)>10th Comet Lake (desktop and mobile)

These are 10SF except for RKL, which of course is 14++++++++++++
10th - Ice Lake (mobile/Sunny Cove)>11th Tiger Lake (mobile/Willow Cove), Rocket Lake (desktop Cyprus Cove aka Sunny Cove @10nm)>

12th Generation - Alder Lake (10SF?) Golden Cove (big) and Goldmont? (little)

The earlier ones before Intel process crapped out are easy.
5th - Broadwell
4th - Haswell
3rd - Ivy Bridge
2nd - Sandy Bridge
1st - Westmere/Nahalem
Core - Conroe core?
P4 and P6 around at the same time I think, Willamette, Northwood, Prescott, Smithfield, something with a "D", P6 core name?

Then it gets hard again...

PIII - Coppermine is all that comes to mind
PII - Klamath, Dechutes?, Mendocino (300A core with 128kb on die full speed cache)
Pentium, Pentium MMX
486 - Clock multipliers, FP on chip
386 - Fully 32 bit in and ext data bus with workable protected mode
286 -
186 - fail for desktop public consumption
8086
8085?
8080?

I'm done.

 

[eek2121]

It is important to note for those trying to estimate the clock speed of ADL-S that the maximum clock speeds between the big cores and small cores may vary. This could also very well be what is throwing GB5 and other benchmarks off.

 

[scannall]

8086
8085?
8080?

I'm done.

The 4004, then the 4040 preceded those. A whopping 3000 transistors on those monsters. ;-)

 

[Exist50]

I agree but I think it's pretty much just me that caused the confusion!
I have it now I think. I'm going to try from memory to test myself.

All of these are Skylake cores and 14nm except for Cannon Lake, which is (failed) 10nm
6th - Skylake>7th - Kaby Lake (Skylake) - 8th (this is the tough one) - Kaby Lake R (mobile), Coffee Lake (desktop/mobile), Whiskey Lake U/Amber Lake Y(mobile), Cannon Lake (I think?)>9th - Coffee Lake R (desktop/mobile)>10th Comet Lake (desktop and mobile)

These are 10SF except for RKL, which of course is 14++++++++++++
10th - Ice Lake (mobile/Sunny Cove)>11th Tiger Lake (mobile/Willow Cove), Rocket Lake (desktop Cyprus Cove aka Sunny Cove @10nm)>

12th Generation - Alder Lake (10SF?) Golden Cove (big) and Goldmont? (little)

The earlier ones before Intel process crapped out are easy.
5th - Broadwell
4th - Haswell
3rd - Ivy Bridge
2nd - Sandy Bridge
1st - Westmere/Nahalem
Core - Conroe core?
P4 and P6 around at the same time I think, Willamette, Northwood, Prescott, Smithfield, something with a "D", P6 core name?

Then it gets hard again...

PIII - Coppermine is all that comes to mind
PII - Klamath, Dechutes?, Mendocino (300A core with 128kb on die full speed cache)
Pentium, Pentium MMX
486 - Clock multipliers, FP on chip
386 - Fully 32 bit in and ext data bus with workable protected mode
286 -
186 - fail for desktop public consumption
8086
8085?
8080?

I'm done.

Alder Lake has Gracemont, not Goldmont .

 

[LightningZ71]

I agree but I think it's pretty much just me that caused the confusion!
I have it now I think. I'm going to try from memory to test myself.

All of these are Skylake cores and 14nm except for Cannon Lake, which is (failed) 10nm
6th - Skylake>7th - Kaby Lake (Skylake) - 8th (this is the tough one) - Kaby Lake R (mobile), Coffee Lake (desktop/mobile), Whiskey Lake U/Amber Lake Y(mobile), Cannon Lake (I think?)>9th - Coffee Lake R (desktop/mobile)>10th Comet Lake (desktop and mobile)

These are 10SF except for RKL, which of course is 14++++++++++++
10th - Ice Lake (mobile/Sunny Cove)>11th Tiger Lake (mobile/Willow Cove), Rocket Lake (desktop Cyprus Cove aka Sunny Cove @10nm)>

12th Generation - Alder Lake (10SF?) Golden Cove (big) and Goldmont? (little)

The earlier ones before Intel process crapped out are easy.
5th - Broadwell
4th - Haswell
3rd - Ivy Bridge
2nd - Sandy Bridge
1st - Westmere/Nahalem
Core - Conroe core?
P4 and P6 around at the same time I think, Willamette, Northwood, Prescott, Smithfield, something with a "D", P6 core name?

Then it gets hard again...

PIII - Coppermine is all that comes to mind
PII - Klamath, Dechutes?, Mendocino (300A core with 128kb on die full speed cache)
Pentium, Pentium MMX
486 - Clock multipliers, FP on chip
386 - Fully 32 bit in and ext data bus with workable protected mode
286 -
186 - fail for desktop public consumption
8086
8085?
8080?

I'm done.

You forgot the Pentium IIIS, Tuallatin.

 

[Cardyak]

I agree but I think it's pretty much just me that caused the confusion!
I have it now I think. I'm going to try from memory to test myself.

All of these are Skylake cores and 14nm except for Cannon Lake, which is (failed) 10nm
6th - Skylake>7th - Kaby Lake (Skylake) - 8th (this is the tough one) - Kaby Lake R (mobile), Coffee Lake (desktop/mobile), Whiskey Lake U/Amber Lake Y(mobile), Cannon Lake (I think?)>9th - Coffee Lake R (desktop/mobile)>10th Comet Lake (desktop and mobile)

These are 10SF except for RKL, which of course is 14++++++++++++
10th - Ice Lake (mobile/Sunny Cove)>11th Tiger Lake (mobile/Willow Cove), Rocket Lake (desktop Cyprus Cove aka Sunny Cove @10nm)>

12th Generation - Alder Lake (10SF?) Golden Cove (big) and Goldmont? (little)

The earlier ones before Intel process crapped out are easy.
5th - Broadwell
4th - Haswell
3rd - Ivy Bridge
2nd - Sandy Bridge
1st - Westmere/Nahalem
Core - Conroe core?
P4 and P6 around at the same time I think, Willamette, Northwood, Prescott, Smithfield, something with a "D", P6 core name?

Nice list, it's pretty much all correct as well.

I adore the fact that Intel's marketing department was given permission to name one of their CPU Microarchitectures "Core". It's literally some of the most complex and convoluted communication I've ever seen in consumer electronics, almost as if it was deliberately named to cause conflation.

So we have "Sandy Bridge" cores, "Nehalem" cores, and.... "Core" cores. Come on, really?

Moving to the "Cove" moniker was one of the best decisions the company has made in recent years in regards to presentation. The naming convention is more streamlined now:

Cove = Big core
Mont = Little Core
Lake = Consumer Product Range
Rapids = Server Product Range

 

[Zucker2k]

Rocket Lake (desktop Cyprus Cypress Cove aka Sunny Cove @10nm 14nm)>

Typos, I suppose.

 

[AMDK11]

I agree but I think it's pretty much just me that caused the confusion!
I have it now I think. I'm going to try from memory to test myself.

All of these are Skylake cores and 14nm except for Cannon Lake, which is (failed) 10nm
6th - Skylake>7th - Kaby Lake (Skylake) - 8th (this is the tough one) - Kaby Lake R (mobile), Coffee Lake (desktop/mobile), Whiskey Lake U/Amber Lake Y(mobile), Cannon Lake (I think?)>9th - Coffee Lake R (desktop/mobile)>10th Comet Lake (desktop and mobile)

These are 10SF except for RKL, which of course is 14++++++++++++
10th - Ice Lake (mobile/Sunny Cove)>11th Tiger Lake (mobile/Willow Cove), Rocket Lake (desktop Cyprus Cove aka Sunny Cove @10nm)>

12th Generation - Alder Lake (10SF?) Golden Cove (big) and Goldmont? (little)

The earlier ones before Intel process crapped out are easy.
5th - Broadwell
4th - Haswell
3rd - Ivy Bridge
2nd - Sandy Bridge
1st - Westmere/Nahalem
Core - Conroe core?
P4 and P6 around at the same time I think, Willamette, Northwood, Prescott, Smithfield, something with a "D", P6 core name?

Then it gets hard again...

PIII - Coppermine is all that comes to mind
PII - Klamath, Dechutes?, Mendocino (300A core with 128kb on die full speed cache)
Pentium, Pentium MMX
486 - Clock multipliers, FP on chip
386 - Fully 32 bit in and ext data bus with workable protected mode
286 -
186 - fail for desktop public consumption
8086
8085?
8080?

I'm done.

RocketLake(x86 CypressCove(SunnyCove)) 14nm
Icelake(x86 SunnyCove) 10nm
Tigrlake(x86 WillowCove) 10nm SuperFin
Alderlake(x86 GoldenCove+Gracemont) Enhanced 10nm SuperFin
SapphireRapids(x86 GoldenCove) Enhanced 10nm SuperFin

 

[Hulk]

Cardyak,

Thanks. Didn't know there was deeper meaning in those designations.

 

[dullard]

If the folks in this thread can’t keep it straight the market at large is doomed to never understand it.

That is the point of code names. They are specifically made to be difficult to understand.

Code name - Wikipedia

en.wikipedia.org

"to protect secret projects and the like from business rivals, or to give names to projects whose marketing name has not yet been determined"

The market at large is suppose to understand generations. 5th generation is worse than 10th generation. Or at least understand numbers. 7700K is worse than 8700K which is worse than 9700K.

 

[Mopetar]

Cove = Big core
Mont = Little Core
Lake = Consumer Product Range
Rapids = Server Product Range

Still a bit messy in my opinion. Too much to do with water. I kind of like the AMD system a bit more. Server chips are Italian cities and the consumer chips are painters. They could probably do a better job splitting the APUs up since you can't tell based on name alone, but the categories are a little more distinct.

Ultimately they all suffer the problem of too many generations and it doesn't matter if you're using lakes or painters. I can easily remember everything up to Skylake, but after that it gets fuzzy. Too many lakes and no real clear ordering for any of them. If you want to have a bunch of lakes, make the sequence alphabetical so the order is easy to remember. AMD is starting to run into the same issue.

Best system would use one each of people, places, and things. Easier to keep them separate and possibly map them to category. After that no more than four generations for a scheme and if there are use something to help make the ordering clear or easy to recall.

 

[AMDK11]

X86 Skylake + L2 core - 217 million transistors.

X86 CypressCove + L2 core - 300 (+ 38% to Skylake) million transistors.

The 10 Skylake cores are 2.17 billion transistors.

The 8 CypressCove cores are 2.4 billion transistors, which is 11.6% larger than the 10 Skylake cores. 8 CypressCove cores have an area of 11 Skylake cores.


The hypothetical 10 CypressCove cores already have 3 billion transistors and 38% more surface area than the 10 Skylake cores.
10 CypressCove cores would be approximately 14 Skylake cores.

 

[Hulk]

X86 Skylake + L2 core - 217 million transistors.

X86 CypressCove + L2 core - 300 (+ 38% to Skylake) million transistors.

The 10 Skylake cores are 2.17 billion transistors.

The 8 CypressCove cores are 2.4 billion transistors, which is 11.6% larger than the 10 Skylake cores. 8 CypressCove cores have an area of 11 Skylake cores.


The hypothetical 10 CypressCove cores already have 3 billion transistors and 38% more surface area than the 10 Skylake cores.
10 CypressCove cores would be approximately 14 Skylake cores.

That information has been hard to come by for later model processors. Where did you get or how did you calculate those numbers?

Did you make measurements, use transistor density?

Not doubting them just wondering.

 

[AMDK11]

Jim Keller at the Intel presentation revealed that a single x86 Skylake core consists of 217 million transistors and a single x86 SunnyCove core consists of 300 million transistors, which is 38% more.

The Rocketlake chip (x86 CypressCove) and the Cannonlake chip (x86 Skylake) were made in the same 14nm manufacturing process so I assume the density is comparable.

 

[Carfax83]

Keep in mind we have only TGL-U results and AVX512 has been disabled by default on TGL for this x265 version (you did remove the separate AVX512 table). Usually the ULV versions have a lower IPC because the uncore can be clocked lower, much worse RAM timings and things like this.

How much performance does AVX512 add to x265?