If manufacturing process and tools are ready they can just tape out product to them. But when manufacturing process isn't complete yet there is no way to tape out design. So they tape-in design, trying to develop design and process design rules to actually manufacturable and when they are ready design is taped out.
Those Intel links they estimate that tape out for product family should happen within three years of tape-in of first product......
That document is specifically a customer agreement with Altera where Intel will manufacture and sell all products with a "Product Attachment" agreement which can also include similar or successor products that are part of the same product family. The three year clause is a limitation on the original Product Attachment for a given product family. Intel expects all products in the family to tape out within 3 years of the lead product tape in, otherwise a new or updated Product Attachment would be required.
Nah, tape-in is after verification and PD sign-off, you can't tape in if you have not verified your interfaces.
Historically tape-in just meant before the GDS generation and tape-out meant handing off GDS to the fab. But considering the likely state of Intel 7nm it could just mean that design has signed off and moved on while the fab figures out how to make the thing.
Intel shifted to "tape in" in their public communications with 10nm / Ice Lake. Given the heavy reliance on multi-patterning and the increasing number of steps between GDS and actual mask data production, the period between design sign-off and having a usable set of masks was probably way longer than for previous nodes. Their general struggles with 10nm viability and concurrent manufacturing capacity constraints would have further exacerbated that.
Intel uses certain engineering milestones for accounting purposes so what they say publicly is often carefully worded as those milestones often have a material financial impact. For instance, costs incurred in the design life cycle up to the point of producing the first full set of masks are recognized as R&D expenses, and thereafter as cost of sales. Thus "tape out" would generally signal that transition occurring within the quarter, whereas "tape in" could indicate a delay of one or more quarters prior to mask production.
From what you are saying, though, it seems pretty clear that "tape in" means that physical design has been completed and the final layout for the entire SoC or tile is ready to be released to manufacturing.