I know this is very rough maths and the i9 is probably power starved, the difference between the i5, i7 and i9 shows adding each extra E core gives roughly 40% of a P core's performance when the core's fully loaded.
I know they were expected to be around 60% of the performance but I wonder if when fully loaded they drop further behind, a limitation of the shared l2 and ring stop perhaps?
Doesn't the 11900K get 5700 points at 250W?
The improvement is 50% once you add in 19% gain for the Cove cores, and the clocks haven't changed. The E cores are still in the 50% range.
Golden Cove's 30% area gain for 19% improvement despite an extra pipeline stage is a very good step in the right direction, considering adding pipeline stages cost performance, power use and area and we got same ballpark 19% range with Sunny Cove but a 38% increase in area.
@mikk
AVX2 shouldn't take a lot, even if Gracemont has both dual 256-bit units and FMA support. The diagrams seem to point towards a 128-bit FMA configuration similar to earlier AMD chips. I think the clock focus to get it from 3 to 4GHz is costing them.
I calculated 0.25mm2 for AVX256 units. Really, the addition shouldn't have been more than 0.1mm2. Even then we're talking 1.6mm2, still in the 90 percentile increase in core area.
I am hoping Intel eventually gets into the Tablet business, but naturally, organically this time by making an efficient chip. Gracemont's size seems to push away from that idea.
Going from a 0.88mm2 Tremont, to 1.7mm2 Gracemont, even with 2-4x vector unit performance and 30% uarch improvement doesn't sit right with me. Hopefully it's really good in the perf/watt department at least. And I mean "really good" by making it worth it in the mobile space despite the scheduler headaches. If say the 15W 2+8 is 25% faster than 28W Tigerlake in MT, and 4+8 28W is twice as fast, then probably.