Discussion Intel current and future Lakes & Rapids thread

[DrMrLordX]

Semantics mostly

The problem here is that Intel's own engineers and marketing department were content to call the Intel 4 process "7nm" for quite some time. And the same engineers and marketing dept referred to Intel 7 as 10nm Enhanced SuperFin.

Even if we defer to Intel's own marketing, we can't call Intel 7 "7nm", because they clearly labeled it as a 10nm node with their own language.

He loves Intel. Asking him to remove the blinders is like trying to move a rock.

As long as he stays positive, a little cheerleading every now and then isn't terrible. Might be cringeworthy from time to time but, not really harmful.

 

[Exist50]

https://twitter.com/x/status/1535725309265424389

Meteor lake

I don't know why he seems to be confused by the aspect ratio. Everything matches the silicon and diagrams shown.

 

[eek2121]

davidbepo claims no 3nm GPU chiplet for MTL-S, instead there are 64EUs included in the Soc tile which uses 10ESF. Maybe the chipset is still separate on desktop board, in this case there is enough space for a 64EU 10ESF GPU. Not the best node for GPU efficiency but who cares on desktop with only 64EUs.

https://twitter.com/x/status/1534283901232893953

Intel has not, thus far, spent the amount of money/time/effort to port DG2 (and beyond) to an Intel specific process, and I seriously doubt they'd start with a process that will soon be "in the rear-view mirror".

I found a better quality shot of a 8P + 8E Meteor Lake picture

They can fit 40 e-cores on this node.. ✅

I could fit 65,536 6502 cores in the space of a "P" core, that doesn't mean my chip is faster...

Uhm, you are joking, right? Right?

Are you? Intel 4 is significantly ahead of current TSMC stuff. I'm super pessimistic regarding Intel, but if leaked information is correct, they might finally save the Titanic.

 

[RTX2080]

It's shocking we see next gen Meteorlake die shot way earlier than Raptor, I wonder what would that mean.

 

[DrMrLordX]

It's shocking we see next gen Meteorlake die shot way earlier than Raptor, I wonder what would that mean.

When did we see the first die shots of Alder Lake?

 

[IntelUser2000]

Are you? Intel 4 is significantly ahead of current TSMC stuff. I'm super pessimistic regarding Intel, but if leaked information is correct, they might finally save the Titanic.

They don't seem to be using the most dense implementation at least on Meteorlake. But if Meteorlake doesn't use it and that's the only Intel 4 chip, what will?

Maybe that's the "low hanging fruit" for Intel 3? Products using the full potential?

t's shocking we see next gen Meteorlake die shot way earlier than Raptor, I wonder what would that mean.

Raptorlake despite what will be a decent performance improvement is a filler because of delays. It should have been Meteorlake full launch in early 2023 after Alderlake. And it's also Intel 7 in late 2022. Nothing to be proud about really.

I think we'll see a staggered launch at least until Lunar Lake. Meteorlake will not have a full launch, and I doubt Arrowlake will either. Some are saying Lunar Lake is ultra low power mobile which means it could be until Nova Lake we'll wait to see a full scale launch, and I mean 5W Tablet/super ultra portable to 125W+ K chips.

(Although at this point for me the reputability of ALL leakers are tarnished. Raichu, MLID, kope-something, everyone. The companies are doing a pretty good job throwing them off)

@Exist50 I have to say if Lunar Lake is really launching only for ULP mobile then it does suggest a reshuffling of client roadmap and coincides with why Granite Rapids on 3 is "10-12%" over Granite Rapids on 4. Prioritizing ultra fast launches and taming down uarch gains to minimize disruption, staggered launches shuffling between server/client/high end/low end to gain process lead, and THEN get the big guns lined up.

 

[JoeRambo]

In theory, Intel must use EUV on M0 (and FEOL) only.
Other metal layer could be dealt with by SADP or single patterning.
This fact is very significant in yield / throughput.

This^^. While Intel's 10nm ( as named in 2016 or so, in seminal Mark Bohr's presentation ) was incredulously betting the farm on SAQP with M0 and M1, this process instead is very conservative with EUV usage and there rest is good old SADP, with very respectful distance from dreaded 40nm pitches.
Good to see Intel doing an engineering first process and not some "foundry density" or power point slide focused one. Should have good yields and might give Intel the edge they really need.

Tho, i gotta admit i am completely lost in all those lakes, i have no idea what future products Intel has in store for desktop enthusiast like me. Is the old roadmap of 8+32 still valid? or are we getting 16+16?

 

[lobz]

Say what?



3x crap volume = 3x crap volume.

Ice Lake-SP took forever and a day to get to market ,and months and months to reach volume, and they're still only shipping 1 million per quarter?!?!?

AND WHERE IS SAPPHIRE RAPIDS WHICH WAS THE WHOLE POINT

Look at your own cited numbers, over 80% of that volume was still 14nm, probably selling at a discount since its so old. And Intel is getting hammered on margins with their 10nm products from their own earnings reports.

Stop drinking the Kool-Aid.

edit: I will add, I'm surprised people are still buying so much Cascade Lake. Nobody seems to be able to replace Intel's 14nm volume. Even Intel!

Yes, finally making good on previously built-up failed deliveries doesn't mean it's gonna ship that much all the time, nor that they'd even had caught up with their own promises from waaaay back. Just another marketing gimmick, the same marketing execs have prepared Pixel Pattie really well, to transition into the exact same lying piece of garbage that the previous few CEOs have been. It's just an added bonus, that his Jensen levels of narcissistic personality seems to fit this role quite perfectly.

 

[lobz]

They don't seem to be using the most dense implementation at least on Meteorlake. But if Meteorlake doesn't use it and that's the only Intel 4 chip, what will?

Maybe that's the "low hanging fruit" for Intel 3? Products using the full potential?



Raptorlake despite what will be a decent performance improvement is a filler because of delays. It should have been Meteorlake full launch in early 2023 after Alderlake. And it's also Intel 7 in late 2022. Nothing to be proud about really.

I think we'll see a staggered launch at least until Lunar Lake. Meteorlake will not have a full launch, and I doubt Arrowlake will either. Some are saying Lunar Lake is ultra low power mobile which means it could be until Nova Lake we'll wait to see a full scale launch, and I mean 5W Tablet/super ultra portable to 125W+ K chips.

(Although at this point for me the reputability of ALL leakers are tarnished. Raichu, MLID, kope-something, everyone. The companies are doing a pretty good job throwing them off)

@Exist50 I have to say if Lunar Lake is really launching only for ULP mobile then it does suggest a reshuffling of client roadmap and coincides with why Granite Rapids on 3 is "10-12%" over Granite Rapids on 4. Prioritizing ultra fast launches and taming down uarch gains to minimize disruption, staggered launches shuffling between server/client/high end/low end to gain process lead, and THEN get the big guns lined up.

Intel 7 late 2022? Maybe according to the 16th reiteration of their publicly shared roadmaps.
Unless you were specifically talking about a desktop product there.

 

[lobz]

Intel 4 looks like a fanastic node 2x density over intel 7 so 200mmt density... can't wait for meteor lake 😁

10nm was (supposed to be) an even more fantastic node. 4 years after its originally planned ramp date it finally became a very different, but still extremely competitive node, but noone will ever be able to tell, how much that *actually* cost the company.

To which point is trying to save face at all costs worth more than making sensible decisions? We'll see.

 

[Timmah!]

Seeing those MTL tiles, both the 6 and 8 P core ones, if only Intel could make a HEDT product with 3-4 of them on a single chip, this year already. Would such hypothetical product still need the EMIB bridge like Sapphire Rapids, or would it all be connected by that Foveros stacking thing?

 

[jpiniero]

https://twitter.com/x/status/1535725309265424389

Meteor lake

That P die looks big for I4 in 2023. The good news is that I assume that a core-only die like this would be easy to salvage most dies... even if they have to cut very far. Still, I don't see them having enough capacity to do a full release. Arrow being available in time to be a part of that gen doesn't seem realistic.

 

[nicalandia]

That P die looks big for I4 in 2023.

That is expected when the area reduction is only 25%.

 

[Ajay]

He loves Intel. Asking him to remove the blinders is like trying to move a rock.

Well, looking at his join date, he is new to these forums. He may as well be new to CPU technology, so I'll be nicer in the future. I forget what it's like to be a newbie - since that was over two decades ago.

 

[Ajay]

Are you? Intel 4 is significantly ahead of current TSMC stuff. I'm super pessimistic regarding Intel, but if leaked information is correct, they might finally save the Titanic.

Intel 10 is ahead of TSMC 5?? Is that what you are saying. I don't care abut test shuttles. I'm talking about real density - for CPUs or GPUs. Those have to include more dark silicon and have allot more no-go zones when laying out the actual implementation (hot spot problems).

 

[uzzi38]

Intel 4 looks like a fanastic node 2x density over intel 7 so 200mmt density... can't wait for meteor lake

Eh, not quite 2x.

https://twitter.com/x/status/1535576326685753345

 

[Exist50]

I think we'll see a staggered launch at least until Lunar Lake. Meteorlake will not have a full launch, and I doubt Arrowlake will either. Some are saying Lunar Lake is ultra low power mobile which means it could be until Nova Lake we'll wait to see a full scale launch, and I mean 5W Tablet/super ultra portable to 125W+ K chips.

I can certainly believe Lunar Lake is just low power mobile. If nothing else, it matches Intel's slide. With that in mind, I think Panther Lake is the first (and possibly only) chance to have a true top to bottom lineup (for 2025?).

But I also think there's a distinct possibility that Intel never has a single top-to-bottom architecture again. A split like AMD has (mobile and mainstream vs enthusiast) seems quite plausible. In some ways, that seems like what they're doing with Lunar Lake and Arrow Lake. Same cores, just very different everything else. But tbd.

@Exist50 I have to say if Lunar Lake is really launching only for ULP mobile then it does suggest a reshuffling of client roadmap and coincides with why Granite Rapids on 3 is "10-12%" over Granite Rapids on 4. Prioritizing ultra fast launches and taming down uarch gains to minimize disruption, staggered launches shuffling between server/client/high end/low end to gain process lead, and THEN get the big guns lined up.

Nah, Lunar Lake was settled a while ago. This isn't anything new. For Granite Rapids, I imagine the conversation went something like, "Well the IO die is [redacted], but the cdie is slightly less [redacted], and both the new process and core are a lot better, so...". I think Intel has most of their issues at an SoC-level anyway.

 

[Doug S]

Eh, not quite 2x.

https://twitter.com/x/status/1535576326685753345

And 1.63x would be the best case scenario, caches and PHYs scale worse so sounds like they won't hit 50% more transistors per mm^2 on any real designs.

 

[JasonLD]

Eh, not quite 2x.

https://twitter.com/x/status/1535576326685753345

I think the scaling is greater for High performance library which would be more important for Intel, which is actually closer to 2x scaling.

https://twitter.com/x/status/1536168118057320450

 

[itsmydamnation]

honest question in terms of area scaling why do we care about the Z plane?
I can understand performance trade off side, amount of material , resistance etc but "we unwashed" measure die size in two dimensions.

 

[Henry swagger]

Intel Core i9-13900 'Raptor Lake' Early CPU Sample Tested, Up To 50% Faster Than Core i9-12900 'Alder Lake' at Just 3.7 GHz Clock Speeds

Intel's 13th Gen Raptor Lake Core i9-13900 CPU benchmarks have leaked and show a 50% performance improvement over Alder Lake in ES state.

wccftech.com

Raptor lake is looking mighty 50% faster at low clocks

 

[Exist50]

honest question in terms of area scaling why do we care about the Z plane?
I can understand performance trade off side, amount of material , resistance etc but "we unwashed" measure die size in two dimensions.

Are you asking about library height, fin height, or die thickness (z-height)?

 

[ashFTW]

Intel 4 IEEE VLSI 2022 conference paper should be out shortly (some figures already leaked). In the meantime there is a nice article by David Kanter @ RealWorldTech

Intel 4 Process Scales Logic with Design, Materials, and EUV

 

[JoeRambo]

Intel 4 IEEE VLSI 2022 conference paper should be out shortly (some figures already leaked). In the meantime there is a nice article by David Kanter @ ReatWorldTech

I found this the most interesting in the whole article:

As previously discussed, the contacts for Intel 4 almost certainly rely on EUV. However, in an ironic twist the only sub-40nm pitch metal layer, the 30nm M0, is still formed using SAQP . This is quite an interesting choice as it implies that the overall economics of SAQP are superior to single-exposure EUV in some situations. While this runs counter to the prevailing narrative, it is likely a reflection of the different strengths of EUV and SAQP patterning and may also be tied to the current throughput impact of the pellicle.

Moving up the interconnect stack, the M1-M4 layers are all loose enough pitch that self-aligned double patterning (SADP) with restricted layout is a viable option – similar to the approach employed for Intel’s 10nm and 14nm process technologies. That being said, it appears that Intel is using EUV in some of these metal layers.

Some crazy stuff right there if true. Printing fine features with SAQP, but some less tight one with EUV? No wonder there is Intel 3 in pipeline as well, some low hanging fruit there.

 

[lightisgood]

BRAVO... "Enhanced Cu", M0-M4 metal, is the super work.
We know, despite relying on Co, Intel 7 achieves the world highest 5.5GHz clock.
Though I have to analyze via-resistance, I expect that Intel 4 could usher us into over-6GHz-era.