I'm not going to comment on the absolute number estimate, but the relative growth seems to match what I know about design costs on these processes. If you notice, the 'software' and 'verification' categories are the two highest contributors, not the cost of the physical masks/wafers. This is because the tool vendors force you to pay more money to support lower geometry nodes with their tool sets (usually because it requires additional functionality at lower nodes) and it's not just a little more. The lower nodes you go, the number and complexity of rules also increases and sometimes model complexity increases, which increases the time it takes for simulation and verification. You may also have to start bringing in all new tools into your flow for certain checks because of how hard the physics of everything are being pushed and the complexity of all the new packaging techniques.
It's not just the fab build outs themselves that are increasing in costs, but the cost to design on those processes is increasing significantly as well. I know of several design houses that are well funded (not the big boy Samsung/AMD/Intel type but still pretty well funded) that are trying to stay on older nodes as long as they possibly can because the design cost to jump to the n+1 (for them) node is brutal and so they are trying to make the nodes they are on now work for them as long as possible.