This 13900KS Does 42,000 points. Very HEDT
Quick question, do we know how many cores SPR will sport for HEDT?
I don't think this is actually SPR-X but rather actual Workstation parts. But alright then.
I don't think this is actually SPR-X but rather actual Workstation parts. But alright then.
Roughly seems that way from what I can make out of the diagram, but it's difficult to tell without knowing what is cache and what is core.Are the E-cores 1/4th the size of the P-cores? Are we looking at a 6+8 design?
The regular -X series is currently more interesting as it's the only one where Intel will essentially have no competition. The last non-WX products released by AMD are based on Rome.That's true but for all practical purposes the W-series workstation parts have taken over from "HEDT". That's true of current gen Ice Lake W series as well, as they use a different socket from their server counterparts.
From that angle you can already get a 38 core Ice Lake W3375. It's actually possible to get an Ice Lake Xeon + workstation motherboard for ~$1100 if high core count isn't needed, and you still get all that connectivity. Of course, it's also possible get the 38 core / 76T on a high end motherboard for 12 grand.
Yes, this particular packaging is for a 6+8 mobile chip. From the actual article: "The new image has a few new details — Intel says this diagram is of a mobile processor that will ship to the market with six performance cores and two clusters of efficiency cores." https://www.tomshardware.com/news/i...ech-for-meteor-lake-arrow-lake-and-lunar-lakeAre we looking at a 6+8 design?
Who cares about the core config if the performance is there? Arguably the best workstation chip would be something like 8-16 big cores and 64-128 Atom. Big cores to handle the serial bottlenecks and a sea of Atom cores to handle highly parallel compute like rendering. And on the topic of accelerators, if they're suitable to the task, then maybe that task isn't a good CPU benchmark at all.Meh, no CPU with just 8 "big" cores is HEDT, in my books, no amount of little cores on top of these, helping it to do well in CB, is going to change that. The score on par with 2 years old TRs is irrelevant. If CB supported GPU rendering, you could hypothetically run it on iGPU part and maybe do equally well (under assumption the iGPU is not too crappy) - you would not call it HEDT cause of that.
There is a non-WS SPR. It's why I was askingIntel HEDT is Dead. Their Xeon W9-3495 has a base clock of 1.9 Ghz. The same as the 8490H which YuuKi_Ans is testing.
Meteor Lake 6+8 compute tile.
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Do you really think there is going to be a Non-WS SPR? I mean the guys are struggling to release normal vanilla SPR, so far the "Monolithic" (Up to 28 Cores) SPR for Desktop has been a glimpse on sisoftware. Perhaps they just cancelled that all together(Like the defunct Non-Pro Threadripper that was built and tested but never released)There is a non-WS SPR. It's why I was asking
Who cares about the core config if the performance is there? Arguably the best workstation chip would be something like 8-16 big cores and 64-128 Atom. Big cores to handle the serial bottlenecks and a sea of Atom cores to handle highly parallel compute like rendering. And on the topic of accelerators, if they're suitable to the task, then maybe that task isn't a good CPU benchmark at all.
The thing is... We have yet to se a 2S System break 80,000 in Cinebench and those are 100+ Cores... The Ice Lake W are just Meh because they are not longer "Extreme Edition" and SPR-X will just be another Workstation CPU.True HEDT cpu of the current generation would be performing far better. If Intel ever manages to release those SPR chips, and they will actually work as intended, then it will be obvious, that HEDT numbers in 2022 are somewhere else.
Agreed, RPL is not an HEDT chip. Was just saying that I think the core configuration is the wrong thing to focus on, and furthermore, that hybrid is actually a good fit for workstation tasks.But is the performance there? 40000 looks great, its HEDT numbers, until you realize its like 3 years old HEDT numbers. True HEDT cpu of the current generation would be performing far better. If Intel ever manages to release those SPR chips, and they will actually work as intended, then it will be obvious, that HEDT numbers in 2022 are somewhere else.
The thing is... We have yet to se a 2S System break 80,000 in Cinebench and those are 100+ Cores... The Ice Lake W are just Meh because they are not longer "Extreme Edition" and SPR-X will just be another Workstation CPU.
that hybrid is actually a good fit for workstation tasks.
Yeah, I'm of the opinion that once you have say 8 E-cores, that's more than enough to take care of all the low priority background tasks. After that, just give me more P cores because if I had a serious multi-threaded workload, I'd want it to run as fast as possible and therefore would like it to run on the fastest cores available. To be fair, this approach is not unlike what Apple does for their workstation SOCs: 2 efficiency cores to handle all of the background stuff, so as to not bog down the performance cores with frivolous tasks, then the rest are the actual performance cores.Not really. E core spamming doesn't really work there. It's all about per core performance.
That's why you have some P cores as well. Workstation tasks are a mix of single, lightly, and highly threaded. Hybrid can cover the gamut.Not really. E core spamming doesn't really work there. It's all about per core performance.
The same amount of power and silicon devoted to E cores would give something twice the performance for embarrassingly parallel tasks.After that, just give me more P cores because if I had a serious multi-threaded workload, I'd want it to run as fast as possible and therefore would like it to run on the fastest cores available.
Zen3 Threadripper Pro are already breaking 100,000 points on a heavy water cooled set up. We have another year to go for the Zen4 TR Pro.Zen 4 Threadripper will care of that surely. And it wont be too long.
Yeah, I don't doubt that. That conclusion is more a consequence of how large the P cores are and/or how small the E cores are. If that relationship didn't exist, it would be more feasible to do a configuration where you have more P cores than E cores.The same amount of power and silicon devoted to E cores would give something twice the performance for embarrassingly parallel tasks.