AMD was doing even worse in the client space this last quarter. It's just that server overshadowed it for both companies.At the expense of margins, though. Seems like their revenue is not doing all that well.
Seems to be far more about Intel's monolithic, single ring design than anything process or [CPU] design related. And clearly it's enough to be competitive until/unless AMD adds another CPU chiplet. 8+32 could conceivably carry them for a long time.That's what I'm alluding to, though. If their design + process were healthier, they'd have a 16+0 part by now.
Yet they're empirically quite useful for scenarios where you'd want >8c to begin with.Adding more e-cores creates its own problem, and Amdahl's Law prevents those e-cores from being useful beyond a certain point.
Still didn't impact their ability to sell Alder Lake laptops. They will do fine. AMD Zen3+ laptops are still not available at the lower price points where ADL-mobile makes more sense to buy.
That's way more than I would want to spend on a laptop (unless it's a gaming laptop with a discrete GPU). My budget is usually under $600 and there's rarely a good AMD laptop available in that price range. I might go for a Zen 4 V-cache laptop or maybe a Zen 5 laptop in future if I can find that for under $800.I've bought one for under £900 with taxes just a week ago.
By the way, a prediction. Next CEO after Pat Gelsinger is gonna be Raja Koduri.
Seems to be far more about Intel's monolithic, single ring design than anything process or [CPU] design related.
Yet they're empirically quite useful for scenarios where you'd want >8c to begin with.
You have a point there!Which explains why Sapphire Rapids and Emerald Rapids make use of them. Er wait, no they don't. Even Granite Rapids won't be using e-cores.
They're making an entire new server line with them. It's absurd to deny their usefulness. The only real argument you can make is that it's taken Intel far too long to make such an obvious move. The ARM folk realized this ages ago.Which explains why Sapphire Rapids and Emerald Rapids make use of them. Er wait, no they don't. Even Granite Rapids won't be using e-cores.
When you look at the performance of Genoa (all big cores) it kind of blows "hybrid and small cores" to bits. That could be why you say some of us are in denial.They're making an entire new server line with them. It's absurd to deny their usefulness. The only real argument you can make is that it's taken Intel far too long to make such an obvious move. The ARM folk realized this ages ago.
I swear, some people are just in denial about hybrid and small cores.
With your pts charts (which I appreciate) you really ought to add clearer notes of what we are actually looking at.
Compared to what? There's no small core server CPU on the market from either Intel or AMD yet, but both have announced plans to offer them. Are you expecting Bergamo to be a failure?When you look at the performance of Genoa (all big cores) it kind of blows "hybrid and small cores" to bits.
That's way more than I would want to spend on a laptop (unless it's a gaming laptop with a discrete GPU). My budget is usually under $600 and there's rarely a good AMD laptop available in that price range. I might go for a Zen 4 V-cache laptop or maybe a Zen 5 laptop in future if I can find that for under $800.
Genoa vs Bergamo is not in the same league as Intel P-core and E-core. E-core is 1/4th the size of P-cores, and way difference functionally. Here is what AT said about them:Compared to what? There's no small core server CPU on the market from either Intel or AMD yet, but both have announced plans to offer them. Are you expecting Bergamo to be a failure?
Really, it's just simple math. Small cores provide more performance for equivalent area and power.
Aren't the purpose of AMD and big vs little cores pretty much the same though? Higher compute density vs Higher core per core performance. Yes AMD isn't making a whole new lineup, but that's because AMD prob didn't want to design an entirely new core for their "small" cores (design cost). Intel on the other hand has been making atom cores for a while before they integrated it into a hybrid architecture, so they probably ran with it.Genoa vs Bergamo is not in the same league as Intel P-core and E-core. E-core is 1/4th the size of P-cores, and way difference functionally. Here is what AT said about them:
"This means that these two cores, while functionally identical, will use different sets of masks. The Zen 4c core has been redesigned to have the same functionality but offer more density combined with a different power/performance point on the voltage frequency curve. This is going to affect power consumption, efficiency, and likely the range of frequencies available. "
So, they will both have AVX-512 and all the other things, but (for example) a Zen 4 core may run 2.4-3.7 ghz, while the Zen4c may run 2.0-3.0 and the power envelope may be 360 vs 250. They are different, but they are not big vs small cores. And the size difference is like ~30% vs 400% for E to P cores. And Zen4 and Zen4c in the same chip ? Not on the roadmap that I know of.
I would love to see ST power scaling or also Big core only MT power scaling. Unfortunately HWUB is already pumping out a lot of benchmarks, so I understand they prob won't have time, but still.Load power efficiency of RPL mobile is pretty impressive. Not entirely shocking of course, running many core at a more modest clock will result in better throughput than running a higher frequency on fewer cores all things equal. Hopefully they work on the idle power. This is a good result given the node disadvantage.
View attachment 76346
| Intel Generational Work Rate Comparison Results | Geomean | Average | ||
| P4 to Conroe | 82.7% | 83.4% | Complete redesign | |
| Conroe to Nahalem | 20.2% | 22.4% | Memory increases, add L3 | |
| Nahalem to Sandy Bridge | 11.8% | 12.2% | Smarter OoO larger registers | |
| Sandy Bridge to Ivy Bridge | 6.7% | 6.9% | Prefetcher improvements | |
| Ivy Bridge to Haswell | 8.7% | 8.9% | add 2 execution ports | |
| Haswell to Skylake | 8.9% | 9.5% | add simple decoder | |
| Skylake to Sunny Cove | 21.0% | 21.3% | add 2 execution ports |
Wow this is actually a really cool collection and normalization of data you have here. Thank you.Is it even remotely possible for us to agree on IPC increases from past generations? And for those of you who don't like the word "IPC" we mean rate of work done at equal frequencies, or throughput at equal frequencies, etc...
A couple of years ago I compiled some benchmarks, normalized clocks, and calculated some percentages. Yes, I know normalizing clocks isn't great as memory doesn't scale, and yes I know there are a million benches out there, I tried to mainly stay with Anandtech. This is what I got. Support attached. You can see Intel pretty much works on one end then the other...
Intel Generational Work Rate Comparison Results Geomean Average P4 to Conroe 82.7% Complete redesign Conroe to Nahalem Memory increases, add L3 Nahalem to Sandy Bridge Smarter OoO larger registers Sandy Bridge to Ivy Bridge Prefetcher improvements Ivy Bridge to Haswell add 2 execution ports Haswell to Skylake add simple decoder Skylake to Sunny Cove add 2 execution ports
Wow this is actually a really cool collection and normalization of data you have here. Thank you.
The only thing I have to say is that (beyond the already mentioned weaknesses you have outlined in your methodology) is that a couple of interesting generations are missing. Palm Cove would have been extremely interesting to analyze.
Also I feel like the architectural changes should be expanded a bit. Changes in stuff like OOO size would also be a nice addition, for example, without having to blow up how much detail you include.
I also believe you could add an extra table including Intel's own IPC increase figures. To my knowledge, Intel usually uses spec or a wide variety of tests for their IPC testing, so I think it could be pretty reliable, and so far I don't think they outrageously lied about any IPC increases like they do with gaming averages or stuff like that.
Genoa vs Bergamo is not in the same league as Intel P-core and E-core. E-core is 1/4th the size of P-cores, and way difference functionally. Here is what AT said about them:
"This means that these two cores, while functionally identical, will use different sets of masks. The Zen 4c core has been redesigned to have the same functionality but offer more density combined with a different power/performance point on the voltage frequency curve. This is going to affect power consumption, efficiency, and likely the range of frequencies available. "
So, they will both have AVX-512 and all the other things, but (for example) a Zen 4 core may run 2.4-3.7 ghz, while the Zen4c may run 2.0-3.0 and the power envelope may be 360 vs 250. They are different, but they are not big vs small cores. And the size difference is like ~30% vs 400% for E to P cores. And Zen4 and Zen4c in the same chip ? Not on the roadmap that I know of.
While I agree with most points, Zen4c IMHO should be considered to be the starting point for AMD's little line. When Zen5 arrives, the gap might widen by a lot. I hope that AMD will do their best to try and keep the ISA (including extensions) identical. Furthermore I believe that AMD will want to achieve real efficiency advantages for their little cores just like Apple (and just NOT like Intel).Aren't the purpose of AMD and big vs little cores pretty much the same though? Higher compute density vs Higher core per core performance. Yes AMD isn't making a whole new lineup, but that's because AMD prob didn't want to design an entirely new core for their "small" cores (design cost). Intel on the other hand has been making atom cores for a while before they integrated it into a hybrid architecture, so they probably ran with it.
There are merits to what Intel is doing vs what AMD is doing. There are drawbacks, a major one being cost, but I think Intel's method has way more design flexibility. Intel's small cores can be designed without caring about how they scale at 5 or 6 Ghz while AMDs zen architectures have to worry about scaling at high clocks. Intel big cores have to worry about both too though, so the only real advantage from this method is when it comes to designing Intel's small cores IMO.
SUPERB!Okay, this one is even worse than the other. Just a pet project of mine over the years to try and track things.
Red font indicates changes from previous generation.