Discussion Intel current and future Lakes & Rapids thread

[DrMrLordX]

I think ARL will still use more power.

Possibly. AMD still has a 230W PPT part. If Intel dials back the PL2 values a bit, they could slide in under that number.

 

[TwistedAndy]

All I care about is power usage and performance. You could have argued that RL was essentially equal, at least in performance, (except for gaming --7800x3D), but that is in flux now because of the stability issues, and what the performance will be with whatever fix is ultimately done. In performance per watt, AMD is clearly ahead.

Unfortunately, the performance does not scale linearly with the power. The performance per watt ratio depends on the selected power level, and, which is more confusing, it does not scale linearly with the load.

For example, the mobile AMD Ryzen 7950HX, while being more efficient than 13900HX on the full load, has a much higher idle power consumption. As a result, the laptops with 7950HX rarely work longer than 4-5 hours compared to 6-9 hours for Intel.

 

[igor_kavinski]

For example, the mobile AMD Ryzen 7950HX, while being more efficient than 13900HX on the full load, has a much higher idle power consumption. As a result, the laptops with 7950HX rarely work longer than 4-5 hours compared to 6-9 hours for Intel.

Might be dependent on OEM firmware.

https://www.notebookcheck.net/Razer-Blade-14-2024-laptop-review-Futureproofing-with-Ryzen-AI.799687.0.html

8945HS from Razer is BAD but 7840HS from Lenovo looks good enough. Not as horribly behind Raptor as the Razer laptop so it would seem Razer is doing something wrong.

 

[poke01]

Edit: wrong Intel thread.

 

[lightisgood]

Finally, Intel might originate the era of silicon photonics.
I think this Intel's breakthrough should be great opportunity for IFS.
IFS can not only provide the integrated photonics solution for intel products, but also NVIDIA/AMD.

Intel CPU with Optical Compute Interconnect Chiplet Demoed with 4Tbps of Bandwidth and 100m Reach

At 4Tbps, the Intel Optical Compute Interconnect chiplet is designed to co-package optical interconnects directly onto xPU packages

www.servethehome.com

 

[Josh128]

Nope. With tiles, they're ahead in technology already.

Meteor Lake low power performance and core to core latencies certainly call into question that notion.

 

[Josh128]

Lunar Lake has shown otherwise.

Has it though? Its an improvement for sure, but the 17W comparison of Lunar vs Hawk Point merely showed it matching AMDs Hawk Point efficiency.

 

[DavidC1]

Meteor Lake low power performance and core to core latencies certainly call into question that notion.

Geekerwan tests show it's Mobile vs Desktop that makes the difference not "Tiles". RPL-S is 7% faster than RPL-H. We never got a Meteorlake desktop chip where we can completely control everything. How are we so sure about it?

 

[Hulk]

Geekerwan tests show it's Mobile vs Desktop that makes the difference not "Tiles". RPL-S is 7% faster than RPL-H. We never got a Meteorlake desktop chip where we can completely control everything. How are we so sure about it?

Good point. We just assumed a tile latency "because monolithic must be better."

But the reality is we don't know. As you correctly pointed out mobile has always been less performant than desktop when comparing the same architecture on both.

 

[Kepler_L2]

Good point. We just assumed a tile latency "because monolithic must be better."

But the reality is we don't know. As you correctly pointed out mobile has always been less performant than desktop when comparing the same architecture on both.

We already have data on Meteor Lake. LPDDR5 memory latency from RPL to MTL went from ~100ns to ~140ns.

 

[Jan Olšan]

The "advanced" thing about Intel's tiles shouldn't be likely to make a difference in performance.

What I want to see from Intel (and AMD) moving to better packaging and interconnect is getting rid of the power draw tax of chiplets.

 

[DavidC1]

The "advanced" thing about Intel's tiles shouldn't be likely to make a difference in performance.

What I want to see from Intel (and AMD) moving to better packaging and interconnect is getting rid of the power draw tax of chiplets.

It is impossible to eliminate it completely. But it's a bigger task on GPU because it requires much higher bandwidth, and on-die will always be lower latency.

Tricks will have to be used to mitigate the effect, such as 3D stacking, which comes with it's own issues such as thermals.

 

[eek2121]

The "advanced" thing about Intel's tiles shouldn't be likely to make a difference in performance.

What I want to see from Intel (and AMD) moving to better packaging and interconnect is getting rid of the power draw tax of chiplets.

Lunar Lake has a 9W SKU. How low are you looking for and why?

Efficiency is important, sure, particularly for mobile, but they aren’t targeting phones with these chips.

They could, but they won’t.

God help Qualcomm if they did. Intel could release an 8 core 4.5W SoC for Android OEMs and things would become quite interesting.

 

[SiliconFly]

Lunar Lake has a 9W SKU. How low are you looking for and why?

Efficiency is important, sure, particularly for mobile, but they aren’t targeting phones with these chips.

They could, but they won’t.

God help Qualcomm if they did. Intel could release an 8 core 4.5W SoC for Android OEMs and things would become quite interesting.

I don't think they can target mobile until 14A. Mobile designs need to done on mobile-centric higher density libraries. Something they don't have right now.

 

[desrever]

I don't think they can target mobile until 14A. Mobile designs need to done on mobile-centric higher density libraries. Something they don't have right now.

you don't think TSMC N3 has mobile libraries?

 

[DavidC1]

you don't think TSMC N3 has mobile libraries?

Yes, but they won't use TSMC for compute if their process is good. That what he means. Intel still has ways to go before their process is mobile optimized.

Their process is excellent for high frequency designs, which should be tempered down with a better performing core(per clock).

 

[DavidC1]

Server outlook:

Since Skymont is 2% faster than Raptor Cove/Zen 4 and Geekerwan tests show Zen 5 is 6% faster than Zen 5C while OneRaichu says Darkmont has front-end changes, the per core difference between the two E cores are going to be zero in the next generation. Which speaks a lot about how Clearwater Forest will fare.

Zen 4 is 65% faster than Gracemont in FP, but Zen 5 will be less than 25% faster compared to Skymont. This weakness won't matter too much for the target market but it'll still do much better and with 50% core count advantage it can also be easily overcome.

It is unlikely CWF will clock lower when current E cores already clock so high. I do not expect the clocks will be higher than Turin Dense considering SRF but it won't be lower.

In applications where Sierra Forest is already doing very close to Bergamo, Clearwater Forest will massacre the competition. It'll look very much like Jaguar vs Bay Trail comparison, where the latter was faster and lower power.

The 176 core CWF will be slower but at 350W TDP it should offer much lower power consumption.

It is a disappointment then to hear that CWF might not have a successor. Truly a short term profit focused company, and a stupid one. The fact that the Atom team will be sidelined again suggests the internal politics is the biggest problem and always will be. When things are at a point where conflicts can't end, the only solution is to let it die so you can truly start fresh.

 

[SiliconFly]

... Clearwater Forest will massacre the competition. ...

With SKT perf bump, thats already kinda a given imho.

... This weakness won't matter too much for the target market but it'll still do much better and with 50% core count advantage it can also be easily overcome. ...

Thats still the biggest problem with Intel. Brute forcing their way to win with too much muscle power. But considering the skt gains, i'd say it's okay to overlook this (at least this time around).

The day they win over competition with a smaller die, higher ipc, more power efficiency and lower clocks, that would be a true win. That would mark their return to true leadership.

... the only solution is to let it die so you can truly start fresh.

You weren't happy that I wasn't happy with the P core team a while back. Now you too aren't happy either. A point to ponder!

 

[DavidC1]

With SKT perf bump, thats already kinda a given imho.


Thats still the biggest problem with Intel. Brute forcing their way to win with too much muscle power. But considering the skt gains, i'd say it's okay to overlook this (at least this time around).

Clearwater Forest doesn't need SMT to win, which is a big deal. This is a perfect Cloud/VM chip.

Brute forcing is Raptorlake, where it used nearly 400W to barely beat the competition. CWF does not have that problem.

The day they win over competition with a smaller die, higher ipc, more power efficiency and lower clocks, that would be a true win. That would mark their return to true leadership.

Pay attention. The weakness does not matter in the Zen 5C/CWF market. The Integer performance does though.

You weren't happy that I wasn't happy with the P core team a while back. Now you too aren't happy either. A point to ponder!

What? I was never happy with the Intel P core team.

Intel arrogantly refuses to see from the eye of it's customers, current and potential ones. When Apple wanted a lower power chip and their closest partner refused to listen, they abandoned them and went in a whole another direction. The fact that they don't have a direct successor to Lunarlake means they haven't learned anything.

 

[SiliconFly]

The weakness does not matter in the Zen 5C/CWF market. The Integer performance does though.

Sry abt the confusion. I wasn't comparing them with competition. All I meant was, in order to be a true leader, they should pave the way that others follow (like what apple is doing with their M series silicon) and not the other way around, always trying to catch up.

Intel arrogantly refuses to see from the eye of it's customers, current and potential ones. When Apple wanted a lower power chip and their closest partner refused to listen, they abandoned them and went in a whole another direction. The fact that they don't have a direct successor to Lunarlake means they haven't learned anything.

Very true. But aren't we kinda already stereotyping PTL? Maybe Panther Lake H or U series (maybe) has enough potential to be an excellent Lunar Lake successor. Just sayin' that the possibility exists (esp. due to 18A advantage).

 

[sgs_x86]

..... The fact that they don't have a direct successor to Lunarlake means they haven't learned anything.

PTL-U is the successor to Lunar. 4P+4LPE, igpu, npu all on the 18A die with a secondary for i/o and security stuff. This is the same formula as Lunar.
I think PTL-H moves the igpu to a separate tile (N3 or 18A ?) so that they can fit more Xe cores. Then they add 8 E-cores. So we have 4P+8E+4LPE for PTL-H.

 

[DavidC1]

PTL-U is the successor to Lunar. 4P+4LPE, igpu, npu all on the 18A die with a secondary for i/o and security stuff. This is the same formula as Lunar.

Same formula = equal, and PTL-U does not equal Lunar.

Optimized LPDDR controller PHY, SLC cache, sane PL2 TDP, minimum amount of tiles to reduce latency and redundancy, THAT'S Lunarlake.

Every chip from 30W and downwards should be using an entirely different SoC purely optimized for battery life, and everything above it based on high performance. If you think PTL-U is enough, then they still could have done better.

They made the same suboptimal decision when they eliminated E5 vs E7 division for servers. E7 = Big Iron and E5 is regular server. When you want to address diverse markets with one product you are bound to have a suboptimal product.

Big Iron needs very high memory capacity even it comes with slightly reduced performance with memory repeaters. Also the validation cycles are lot longer and it's RAS requirements are higher. Also the chip itself has massive caches.

Rest of the server market was served by E5 very well. It has almost PC like requirements hence why it forgoes memory repeaters and extra RAS features. It is cheaper as a platform and chip too.

Mobile power savings talk about eliminating every mW. So why wouldn't a most optimized platform be needed? You should also wonder why Dell isn't planning to use PTL-U for the XPS 13 and continuing with Lunarlake instead, and only XPS 14 and up is using PTL-U.

 

[dullard]

Mobile power savings talk about eliminating every mW. So why wouldn't a most optimized platform be needed? You should also wonder why Dell isn't planning to use PTL-U for the XPS 13 and continuing with Lunarlake instead, and only XPS 14 and up is using PTL-U.

I'm not following your logic here. The XPS 13 current Intel offering uses a 28 W base, 115 W turbo CPU (Meteor Lake 155H). The XPS 15 uses a 45 W base, 115 W turbo 13620H. Both of those use -H chips. Neither of those are the market for the ultra-portable Lunar Lake (8 W to 30 W). Did you mean to mention the Dell ultra-portables like the Latitude 5550 or 7450 that use the -U processors?

Plus PTL-U is rumored to be 35% more power efficient than LNL-U. Why wouldn't that be the successor if you claim it is all about eliminating every mW?

 

[SiliconFly]

I'm not following your logic here. The XPS 13 current Intel offering uses a 28 W base, 115 W turbo CPU (Meteor Lake 155H). The XPS 15 uses a 45 W base, 115 W turbo 13620H. Both of those use -H chips. Neither of those are the market for the ultra-portable Lunar Lake (8 W to 30 W). Did you mean to mention the Dell ultra-portables like the Latitude 5550 or 7450 that use the -U processors?

Plus PTL-U is rumored to be 35% more power efficient than LNL-U. Why wouldn't that be the successor if you claim it is all about eliminating every mW?

I'm pretty sure some Panther Lake sku will act an replacement for LNL (primarily due to 18A).

 

[dullard]

I'm pretty sure some Panther Lake sku will act an replacement for LNL (primarily due to 18A).

That is how I interpret the rumors. But DavidC1 has been going on for months that Panther Lake is not a successor to Lunar Lake (just a couple of many example links are below). I just cannot fathom how an ultra-low power 4+4 Panther Lake-U is not a successor to an ultra-low power 4+4 Lunar Lake-U. My best guess is that DavidC1 is confusing -U chips (lower power, only 2 types of cores) with -H chips (higher power, 3 types of cores).

Will Lunarlake be a one-hit wonder with no successor like many previous Intel products that was supposed to be great?

Are they so cautious that they can't dedicate a Lunarlake successor?

My guess is if Lunarlake is more popular than Intel expects, then they'll make a derivative of Pantherlake to be a direct successor.*

Because Pantherlake is using the P+E+LPE setup again. It is possible that we need THIRD wildly different SoC. One for server, one for desktops and high performance laptops and one for ultra low power laptops.

*Lunarlake might be a one off thing just to fend off ARM.