Intel Enthusiast CPU Predictions

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rge2

Member
Apr 3, 2009
63
0
0
Just FYI, since there are cringe-worthy conspiracy theories about TIM vs solder being perpetuated, it is most certainly not a cost issue. There really is not a difference between the two worth even noting. Additionally, it is not the historic norm to use TIM on mainstream processors - as many prior mainstream processors did not. However, the difference with the IVB is that it is a small and fragile part, and using solder on that type of process can potentially cause significant mechanical stress. The Haswell is even more delicate in this respect due to the integrated VR being on die - Being able to guarantee quality without issues from mechanical stress far outweigh the needs of extreme overclockers to intel, as people expect quality, stability, and longevity - especially their OEMs which sell processors/PCs in bulk.


the only cringe-worthy theory I have heard is that ivb is small and fragile and cant handle solder.

there are solder die attaches for much smaller dies than ivy/haswell.

And not a thermal difference between 150 microns of 5 w/mk paste and intel indium solder at 87 w/mk......um ok.

Funny about cost, in several intel white papers which I linked 4-5 years ago in realtemp thread on xtreme when drilling holes through IHS with thermocouples....intel seemed to think solder was more expensive, cost wise and yields because of solder failures.....but thinks for clearing intels misconceptions up.

intel in white papers specifically stated they developed and used more costly solder only to meet thermal specs under worst testing conditions of high tdp/power density cpus. IVY and haswell simply dont warrant the more costly stim, as they operated well within spec at stock...and even modest oc.
 
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blastingcap

Diamond Member
Sep 16, 2010
6,654
5
76
LOL, definitely going to lose sleep on that one.

Just ignore that guy, can't believe he isn't banned yet.

Anyway, back on topic, I have always wondered if 22nm tri-gate had any impact on the TIM thing. I doubt it, but it is one of those things that changed between Sandy Bridge and Ivy Bridge. Has anyone heard anything about how the process that produces tri-gate could impact thermals and TIM, soldering choice?
 

24601

Golden Member
Jun 10, 2007
1,683
39
86
the only cringe-worthy theory I have heard is that ivb is small and fragile and cant handle solder.

there are solder die attaches for much smaller dies than ivy/haswell.

And not a thermal difference between 150 microns of 5 w/mk paste and intel indium solder at 87 w/mk......um ok.

Funny about cost, in several intel white papers which I linked 4-5 years ago in realtemp thread on xtreme when drilling holes through IHS with thermocouples....intel seemed to think solder was more expensive, cost wise and yields because of solder failures.....but thinks for clearing intels misconceptions up.

intel in white papers specifically stated they developed and used more costly solder only to meet thermal specs under worst testing conditions of high tdp/power density cpus. IVY and haswell simply dont warrant the more costly stim, as they operated well within spec at stock...and even modest oc.

The guy you're replying to has already posted his tripe on every single haswell thread, as well as most related threads.

For those where logic does not penetrate, its usually intentional, as in, troll.

No need to feed, just ignore him .
 

rge2

Member
Apr 3, 2009
63
0
0
The guy you're replying to has already posted his tripe on every single haswell thread, as well as most related threads.

For those where logic does not penetrate, its usually intentional, as in, troll.

No need to feed, just ignore him .

thanks for heads up, yeah there is one of those on every forum....hadnt been on this one in a while...just looking at some of haswell shots...
 

parablooper

Member
Apr 5, 2013
58
0
0
But the thing is, $400~500 chips usually don't even need overclocking unless you're running a server or doing professional video editing/encoding of 4K/8K resolutions. So it defeats the original mentality of an overclock.
 

aigomorla

CPU, Cases&Cooling Mod PC Gaming Mod Elite Member
Super Moderator
Sep 28, 2005
20,877
3,228
126
haswell should just come naked DIE.

F the IHS.

its a laptop grade processor to begin.. keep it laptop grade and let the idiots who dont know how to mount the CPU properly break the dies like how we used to do it on the AMD T-birds!
 

24601

Golden Member
Jun 10, 2007
1,683
39
86
haswell should just come naked DIE.

F the IHS.

its a laptop grade processor to begin.. keep it laptop grade and let the idiots who dont know how to mount the CPU properly break the dies like how we used to do it on the AMD T-birds!

I still get chills remembering my friend snapping down the HSF to his barton core.

The sound it made just felt wrong :O.
 

Lepton87

Platinum Member
Jul 28, 2009
2,544
9
81
haswell should just come naked DIE.

F the IHS.

its a laptop grade processor to begin.. keep it laptop grade and let the idiots who dont know how to mount the CPU properly break the dies like how we used to do it on the AMD T-birds!

+1 I'm all for bare dice, even though I chipped one but it was still working fine. I killed another one but that was because I incorrectly mounted a Peltier.
 

RampantAndroid

Diamond Member
Jun 27, 2004
6,591
3
81
haswell should just come naked DIE.

F the IHS.

its a laptop grade processor to begin.. keep it laptop grade and let the idiots who dont know how to mount the CPU properly break the dies like how we used to do it on the AMD T-birds!

Yes, let intel get sued.

 

crashtech

Lifer
Jan 4, 2013
10,554
2,138
146
They used to sell them that way. I never broke one. Seems they could sell them that way in the "K" series at least, but it might be too hard to expressly not warranty physical damage to the die.
 

Pheesh

Member
May 31, 2012
138
0
0
Intel is a manufacturing company and has always optimized for yield and quality on their lines. Common sense would say the switch to TIM @ 22nm on those specific products was made for mechanical stress reasons with the specific usages of said products. Manufacturing processes aren't arbitrarily changed, especially to 'save' negative hundredths of a cent.
 
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rgallant

Golden Member
Apr 14, 2007
1,361
11
81
Well, soon enough we'll have our first data point @ 22 nm when IVB-E is released later this year. One would hope IVB-E outpaces IVB in overclocking (as that wasn't the case with SB & SB-E). Since I'm waiting for HW-E, I hope it overclocks better than HW - we'll see.
this could mean anything but still adds a bit of insider info
http://www.xtremesystems.org/forums/showthread.php?286313-Haswell-Reviews/page5
-post 104
I think you guys are going to love the next Xtreme Edition

Francois
 

RampantAndroid

Diamond Member
Jun 27, 2004
6,591
3
81
They used to sell them that way. I never broke one. Seems they could sell them that way in the "K" series at least, but it might be too hard to expressly not warranty physical damage to the die.

Sure, but then again in those days dies were bigger and less people built their own machines. I still have a Pentium 1 lying around that has the heatsink glued to it.
 

blackened23

Diamond Member
Jul 26, 2011
8,548
2
0
Yep, what he said. Most chips were passively cooled back in the 486 - Pentium days; you can't really do an apples to apples comparison in that respect. You didn't need a huge heatsink fan, all you needed (for a 486 or Pentium I) was something like this:



Obviously cooling solutions are far different now than they were back then. The chips were tailored to the required cooling solution, and chips had far less eloquent coolers then and output far less heat.

Actually, I would completely love it if current chips only required such a small cooler. And still overclocked well. Hahah.
 
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Headfoot

Diamond Member
Feb 28, 2008
4,444
641
126
Hasn't IDC established it's mostly the IHS-to-die gap that is the problem, and only secondarily the TIM? What I wonder is why Intel doesn't tighten up their manufacturing specs so this gap doesn't keep popping up...
 

crashtech

Lifer
Jan 4, 2013
10,554
2,138
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It makes me think they want that gap there for a reason. It should be obvious that they could eliminate it easily if they wanted to do so.
 

Headfoot

Diamond Member
Feb 28, 2008
4,444
641
126
You would also think its obvious that having your CPUs run 20c hotter for no apparent reason would be something they wouldn't think twice about eliminating
 

Ajay

Lifer
Jan 8, 2001
16,094
8,106
136
It makes me think they want that gap there for a reason. It should be obvious that they could eliminate it easily if they wanted to do so.

Yes, the gap between the IVB CPU and IHS is too large for the TIM to be effective and thus accounts for most of the heat build up. A better TIM usually results in only a few degrees difference.
 

crashtech

Lifer
Jan 4, 2013
10,554
2,138
146
So it follows that Intel either can't keep their production tolerances in line (ha ha) or there is another reason compelling enough to make them put out chips that run hotter than they need to.

Who here knows what kind of stress a gap-free die and IHS would be under during thermal cycling? At least when you have a HSF mounted to a bare die there is a lot of flex possible though the HSF mount and even the board itself, "wiggle room" if you will. Inside a tightly adhered lid, there's nowhere for the die to go if expansion causes interference. It might well crack from compressive stress.
 

RampantAndroid

Diamond Member
Jun 27, 2004
6,591
3
81
So it follows that Intel either can't keep their production tolerances in line (ha ha) or there is another reason compelling enough to make them put out chips that run hotter than they need to.

Who here knows what kind of stress a gap-free die and IHS would be under during thermal cycling? At least when you have a HSF mounted to a bare die there is a lot of flex possible though the HSF mount and even the board itself, "wiggle room" if you will. Inside a tightly adhered lid, there's nowhere for the die to go if expansion causes interference. It might well crack from compressive stress.

How much does the IHS flex when the heatsink is clamped on?
 

Ajay

Lifer
Jan 8, 2001
16,094
8,106
136
The problem with 22 nm dice seems to be micro-fractures that occur due to thermal cycling (eventually leading the chip failure). There's not doubt that Intel knows exactly what the limits are. For them, the cost of a fixing this problem for the 0.001% of well informed heavy overclockers isn't worth it. Intel has a solution for them, and it's the Extreme series, where you get to pay twice as much (or more) for a CPU that doesn't have the limitations of the 'K' series.
 

crashtech

Lifer
Jan 4, 2013
10,554
2,138
146
Could that mean that the indium solder can help suppress micro-fracturing by its ductile nature acting as a cushion, or would the benefit be solely due to lower overall operating temps and smaller temp deltas?
 

Ajay

Lifer
Jan 8, 2001
16,094
8,106
136
Could that mean that the indium solder can help suppress micro-fracturing by its ductile nature acting as a cushion, or would the benefit be solely due to lower overall operating temps and smaller temp deltas?

I don't know. If I had to guess, I'd say no, but I don't know exactly what is causing the micro-fracturing that some have talked about (in de-lidding experiments). The bottom line is Intel 'fixed' the problem by leaving a large enough gap between the CPU and IHS so that that failure mode is rendered irrelevant.
 
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