At Intel's Investor meeting they tell the public that the A9 (from TSMC)
has a lower (??!!) transistor density as the A8.
One wonders if they really belief that themselves?
The L3 goes from 4MB to 8MB
The L2 goes from 1MB to 3MB
Only the extra cache brings in 360+ million transistors
increasing the transistor count by almost 20%.
Then there is the increase in GPU increase from four
series 6 clusters to six series 7 clusters. A series 7
is significantly more powerful per cluster clock for clock
as a series 6 cluster. Then add in all the new extra series
7 features like for instance hardware tesselation.
The real transistor density should be 15% or more higher
at least considering of all the added SRAM. The image
below corrects the bar graph further using Intel's own
BDW2+2 numbers (1.3 Billion transistors on 82mm2)
Still being conservative here, A9 densities may be higher.