Yeaa. We have seen that before.Sacrifice latency for more bandwidth. Probably more important in the server level tasks these chips were designed for.
Was thinking of this post:What is said die size?
BTW, the die size has also grown quite a bit.
Broadwell-E 10C die is like 240; Skylake-X 10C die is around 325.
By my totally reliable estimations by looking at the die pict, the core size (inc L3) is about 17 mm2. Kaby Lake is by the same estimation 12.2 mm2.
It has very significantly grown to 17.0 mm2 indeed.
Down to AVX512 probably, the register file alone must have increased fourfold or something.Or is that down to AVX512?
Down to AVX512 probably, the register file alone must have increased fourfold or something.
Hopefully adds some context for the clowns yapping on about Zen, IF and latency.
You purchase low latency ram - problem solved.Actually the Ryzen latencies make more sense in the long run. You want very low latencies for low thread count applications and applications needing more threads need to optimize. Giving bad latency to all cores is a bad idea.
The problem with Ryzen is that perhaps the cross CCX latencies are way too high. We will see how it goes for Threadripper, but cross die latencies will probably be even higher than 140ns.
On that matter for Intel, we know that the ring bus didn't improve as much with higher speed/lower latency ram. Do we already have numbers on how the mesh behaves with higher speed/lower latency ram?You purchase low latency ram - problem solved.
On that matter for Intel, we know that the ring bus didn't improve much with higher speed/lower latency ram. Do we already have numbers on how the mesh behaves with higher speed/lower latency ram?
Uncore is not really tied to memory clock on Intel CPUs.On that matter for Intel, we know that the ring bus didn't improve as much with higher speed/lower latency ram. Do we already have numbers on how the mesh behaves with higher speed/lower latency ram?
The clowns were the ones ignoring or dismissing the issue.
I think it'll be about 160ns to go inter die on there test, the big bit of the latency number will be cache coherency, which shouldnt grow compared to a single zepplin.Actually the Ryzen latencies make more sense in the long run. You want very low latencies for low thread count applications and applications needing more threads need to optimize. Giving bad latency to all cores is a bad idea.
The problem with Ryzen is that perhaps the cross CCX latencies are way too high. We will see how it goes for Threadripper, but cross die latencies will probably be even higher than 140ns.
I think it'll be about 160ns to go inter die on there test, the big bit of the latency number will be cache coherency, which shouldnt grow compared to a single zepplin.
There is a paper that i have a copy of ( i dont know where i got it) that has bulldozers NUMA latencies. Im basing my guesses of that. For BD going intra package was 41ns. Going one socket hop was only an extra 7ns on that. But its interconnects where much slower and its internal system topology is significantly worse.
Well - I guess we'll know when benchmarks come out of SKL-X on games (since a high proportion of clowns use these exclusively as reflective of "performance") as to how important latency is when the software, compiler and scheduler are optimised to keep threads on the same cores where possible and prefetch data where possible.
Oh actually no. What will happen is the same clowns will pick out inappropriate results from inappropriate code and use it to justify their pre-conceived idiocy.