Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[A///]

Meteor Lake seems to be a typical tick release from a performance standpoint, this isn't something new. The big deal will be Arrow Lake. In mobile we might see bigger gains from MTL because of the power efficiency importance...if they can add a separate voltage rail and Intel 4 should help. The jump from 6 to 8 on LNC core is a major change, this is a first sign we will see bigger changes.

Mtl is very much a pipe cleaner release for Intel. It is a stepping stone between what they have now and the next generation of Core, the Arrow Lake project. I had heard of Royal Core a year ago in passing but the name sounded unabashedly childish I couldn't have seen Intel use. I then heard Royal Core had been dropped from consideration but it turns out that was false given that tweet @Geddagod referenced in her or his post.

Gelsinger said Meteor was their big change. MTL being on the lower side of things makes sense but I'm still very confused at what Intel is planning on doing.

 

[Exist50]

Somewhere Intel messed this up. The consumer P cores keep including the unused AVX512 portion. The server cores as seen in SPR have become so huge due to all the additional accelerators that it pretty much has become cost prohibitive to compete directly with AMD's core count (and Bergamo is going to exacerbate that even more).

The accelerators Intel's spending so much time hyping up are separate IP blocks. They're not part of the cores. Though I do think that criticism applies well to AMX. Seems pretty useless for most workloads.

 

[A///]

if intel or amd had half a clue they'd be incorporating hardware accelerators into their consumer processors like apple. it would justify the high msrp for these parts with their boms minus the r&d spending that went into it.

 

[Exist50]

Mtl is very much a pipe cleaner release for Intel. It is a stepping stone between what they have now and the next generation of Core, the Arrow Lake project. I had heard of Royal Core a year ago in passing but the name sounded unabashedly childish I couldn't have seen Intel use. I then heard Royal Core had been dropped from consideration but it turns out that was false given that tweet @Geddagod referenced in her or his post.

Gelsinger said Meteor was their big change. MTL being on the lower side of things makes sense but I'm still very confused at what Intel is planning on doing.

As far as I know, Royal is still very much alive and well. And I've probably said this before, but there should be zero ambiguity when it does arrive.

 

[moinmoin]

I think Intel's P-cores are just hilariously big compared to zen 3 and 4 cores

Was looking for Locuza's dieshot analysis but see you already linked that at reddit before.

Honestly remembered the difference to be smaller between consumer P cores and Zen than this:

https://twitter.com/x/status/1538696558920736769

Instead I remembered the difference between consumer P cores and server cores to be bigger than this:

https://twitter.com/x/status/1538681104642756610

So going by this it seems @Exist50 is correct to blame AMX for some of the size increase of cores in SPR.

 

[A///]

As far as I know, Royal is still very much alive and well. And I've probably said this before, but there should be zero ambiguity when it does arrive.

read @cortexa99 s post before posting this. it was absorbed into lion cove if the rumors are to be believed.

 

[A///]

I think they might be targetting 30% gains here.

30% IPC gain over meteorlake or raptorlake?

 

[Geddagod]

30% IPC gain over meteorlake or raptorlake?

I feel like this is just running away with the hype train.
A) I highly doubt MTL will bring much IPC gains
B) I think slightly less than 20% would be the best bet. Every "new" arch from Intel has been around that IPC figure I'm pretty sure.

 

[A///]

I feel like this is just running away with the hype train.
A) I highly doubt MTL will bring much IPC gains
B) I think slightly less than 20% would be the best bet. Every "new" arch from Intel has been around that IPC figure I'm pretty sure.

????

I was asking if arrow lake will bring those gains in ipc percentage over meteorlake or raptor lake. the meteor lake being a major change was a rumor from long ago. if Intel is targeting arrow lake to have a 30% ipc gain over meteor lake that's huge.

 

[jpiniero]

As far as I know, Royal is still very much alive and well. And I've probably said this before, but there should be zero ambiguity when it does arrive.

Is this another moonshot core? Didn't they cancel the previous one?

 

[A///]

Is this another moonshot core? Didn't they cancel the previous one?

the heck is moonshot core?

 

[Exist50]

read @cortexa99 s post before posting this. it was absorbed into lion cove if the rumors are to be believed.

Anyone saying that is wrong. Simple as that. And note that that tweet was from August, while Raichu claimed it's not just today. But whatever's happening on Twitter is irrelevant. Royal is itself, nothing less.

Is this another moonshot core? Didn't they cancel the previous one?

Yes to both, to my understanding.

 

[Geddagod]

I don't actually expect Lion Cove to be a significant area increase, even putting aside the node shrinks. They should improve a lot from Redwood Cove.

When I saw this message, it reminded me of something that I couldn't remember exactly, and it was just now that I realized lol...
That while the Redwood cove is marginally larger than the Zen 4 core,
Both a hypothetical 8C redwood compute tile and the zen 4 ccd are both around 70mm^2
The Zen 4 ccd has a large infinity fabric section on the ccd.
But I think in servers, Intel will also have to dedicate a marginal portion of it's tiles to the "EMIB" section as we see in the sapphire rapids tile
Just something I found interesting ¯\_(ツ)_/¯

 

[Exist50]

When I saw this message, it reminded me of something that I couldn't remember exactly, and it was just now that I realized lol...
That while the Redwood cove is marginally larger than the Zen 4 core,
Both a hypothetical 8C redwood compute tile and the zen 4 ccd are both around 70mm^2
The Zen 4 ccd has a large infinity fabric section on the ccd.
But I think in servers, Intel will also have to dedicate a marginal portion of it's tiles to the "EMIB" section as we see in the sapphire rapids tile
Just something I found interesting ¯\_(ツ)_/¯

Sure, but there're plenty of advantages to AMD's approach as well. But regardless of the packaging differences, Intel's worse performance density iso-process is a serious problem for Core, and I'm hoping (expecting?) they will at least partially get it under control with Lion Cove. Another arch as bloated as Sunny Cove would be disastrous.

 

[Exist50]

the heck is moonshot core?

A "moonshot" is a generic term used for an "extremely ambitious and innovative project", pulling the applicable definition from the Oxford dictionary.

In the CPU world, Zen would be one such example. Or perhaps Conroe.

 

[Geddagod]

Sure, but there're plenty of advantages to AMD's approach as well. But regardless of the packaging differences, Intel's worse performance density iso-process is a serious problem for Core, and I'm hoping (expecting?) they will at least partially get it under control with Lion Cove. Another arch as bloated as Sunny Cove would be disastrous.

Doing a lot of napkin math from locuza and chips and cheese, and IPC from spec 2007 testing from Raichu:
Was sunny cove even that bad though? Sunny Cove + L2 was like 20% larger than zen 2 with 10-15% higher IPC, and IIRC has avx-512 too. Zen 3 has ~5% higher ipc compared to sunny cove, and sunny cove is only ~10% larger than that core too, and keep in mind zen 3 doesn't have avx-512 either.
What started bloating core size seems to be because the huge increase in L2 cache size. a 2.5X increase with willow cove brought willow cove to nearly 30% greater size, with no real IPC gains. And golden cove with L2 became another 20% increase on top of that, keeping the same cache size as willow cove, meaning it seems like the "core" part of the cpu+l2 seems to have increased 20%.
To drive the 'huge L2 caches' bloating size theory home, I'm also going to examine just the 'core' part of zen 3 and golden cove. Zen 3 core + l2 vs golden cove core + l2, golden cove unit is ~80% larger, which is ridiculous for what ends up being like 15-20% higher ipc and 10% higher max clocks. But just core vs core, it's ~70% larger.
Golden Cove is also just ridiculously large as well though, even disregarding the cache size differences.
I would argue willow cove was really when Intel stopped focusing on core size, and just trying to get a high performance architecture out on whatever the best node they had available was. Golden Cove is huge too, but compared to willow cove, it wasn't even that bad, 20% size increase for 20% ipc and higher clocks, a pretty good trade off.
Idk why willow cove had to balloon it's cache size so much though, leading to a giant increase in core size overall. Maybe it helped in efficiency greatly, or maybe it was needed to hit the higher frequencies sunny cove was not able to achieve (though sunny cove was also handicapped by being on the OG 10nm process and not SF). In the end Intel said it reached 10-20% higher performance, but again, a large part of that was from clocks, and I'm willing to bet the major reason for that was the move to superfin.
However, I do want to add, because of the way the core complexes are structured, 8C vs 8C, with all other components such as power banks and caches included, The GLC 8 cores are only ~35% larger than Zen 3 8C. Perf/Area? The difference is ONLY 20-15%, and that's with GLC being more performant, and I'm guessing higher performance cores generally scale worse on iso node.
It's the same thing with MTL. Redwood cove cores ARE larger than zen 4 cores, but 8c vs 8c, the size is basically the same.
I'm guessing the problem with server is that Intel tiles have large sections of the tile stuffed with EMIB connectors, but also stuff like IO, which for AMD is moved off to it's own chiplet.

 

[DrMrLordX]

if intel or amd had half a clue they'd be incorporating hardware accelerators into their consumer processors like apple.

Not necessarily. Apple has complete ground-up control of the OS used for their products, as well as the developer tools and libraries preferred for the same. They can build support for things like fixed-function hardware and "special" instruction sets like their own AMX into libraries. X86 CPUs are expected to run multiple operating systems and software designed for multiple different CPU generations (and sometimes non-x86 hardware as well). Just getting OEMs to target your fixed-function hardware with library support would be a pain - especially for AMD! Intel could probably pull it off.

And then you have to worry about generational decay, when your fixed-function hardware no longer supports new algorithms/codecs/etc. It limits the useful lifespan of your product. For Apple this makes sense since they want people throwing out their old stuff to buy new stuff as often as possible. Intel and AMD probably want the same, but the reality is that people hold on to old x86 machines for 5+ years nowadays on the regular. It might not affect Intel or AMD too negatively, but end-users would certainly feel the bite.

 

[A///]

Not necessarily. Apple has complete ground-up control of the OS used for their products, as well as the developer tools and libraries preferred for the same. They can build support for things like fixed-function hardware and "special" instruction sets like their own AMX into libraries. X86 CPUs are expected to run multiple operating systems and software designed for multiple different CPU generations (and sometimes non-x86 hardware as well). Just getting OEMs to target your fixed-function hardware with library support would be a pain - especially for AMD! Intel could probably pull it off.

And then you have to worry about generational decay, when your fixed-function hardware no longer supports new algorithms/codecs/etc. It limits the useful lifespan of your product. For Apple this makes sense since they want people throwing out their old stuff to buy new stuff as often as possible. Intel and AMD probably want the same, but the reality is that people hold on to old x86 machines for 5+ years nowadays on the regular. It might not affect Intel or AMD too negatively, but end-users would certainly feel the bite.

what are you talking about? the media engine that accelerates workloads on the m chips is nothing new. It does the following. https://support.apple.com/kb/SP858?viewlocale=en_LB&locale=en_LB

    Hardware-accelerated H.264, HEVC, ProRes, and ProRes RAW
    Video decode engine
    Video encode engine
    ProRes encode and decode engine

unless you have a kf sku from intel your chip does most of that. the 2nd and 3rd bylines are related to the 1st byline. the uhd 770 does all that minus the ProRes stuff which is apple specific. https://www.cpu-monkey.com/en/igpu-intel_uhd_graphics_770-276

the intel does enough but is stuck with av1 decode, but that's where a dgpu takes its place. it should also be able to do hevc12 bit idk why it isn't listed there. h264, h265 and the upcoming h266 or av1 are going nowhere anytime soon in the next decade. most people missed in apple's product unveiling ceremonies they were encoding video using a hardware accelerator. the video quality output on those are what you'd expect from hardware acceleration encoding. software encoding still remains king for crisp video.

their afterburner card is the closest product to a real live input output accelerator card meant for live broadcast that does on the fly encoding that is superior to whatever consumer grade hardware you can get including the afterburner. Such a card runs you anywhere from $5k to $25K.

 

[DrMrLordX]

what are you talking about?

I explained it pretty-well in my post. All fixed-function hardware eventually goes obsolete, and some of it requires specific library support.

but that's where a dgpu takes its place.

This reason is another one why Intel in particular isn't keen on fixed-function hardware blocks for video encode/decode. They already leverage the iGPU.

 

[A///]

I explained it pretty-well in my post. All fixed-function hardware eventually goes obsolete, and some of it requires specific library support.



This reason is another one why Intel in particular isn't keen on fixed-function hardware blocks for video encode/decode. They already leverage the iGPU.

h264 is nearly 20 years old and isn't going anywhere anytime soon. h265's high fees have slowed down its market adoption but it's coming up on 10 years. av1 is only 4 years old and h266 is coming out soon with very low fees and addressing problems with h265. video codecs don't change as fast as you're claiming they do. in 15 years h264 will still be used as will the others. consumer cpus are held for many years like you said, but at the end of the day those who want to keep up with new technology or need it for their work flow will not be sitting on an ancient setup. the casual computer user doesn't care about any of this.

 

[A///]

Anyone saying that is wrong. Simple as that. And note that that tweet was from August, while Raichu claimed it's not just today. But whatever's happening on Twitter is irrelevant. Royal is itself, nothing less.

and this raichu person has never been wrong? Why should I place more faith in this person over that person from august?

 

[DrMrLordX]

video codecs don't change as fast as you're claiming they do.

And yet AV1 is only four years old.

 

[A///]

A "moonshot" is a generic term used for an "extremely ambitious and innovative project", pulling the applicable definition from the Oxford dictionary.

In the CPU world, Zen would be one such example. Or perhaps Conroe.

I know what a moonshot is. I was asking if it was a new core intel was designing. Zen possibly, core not really.

 

[A///]

And yet AV1 is only four years old.

And still has poor support. h264 had higher uptake when it came out. I'm sure you're old enough to remember.

 

[Geddagod]

and this raichu person has never been wrong? Why should I place more faith in this person over that person from august?

I think exist is trying to say he himself has his own sources, and he knows it's not royal core either.
BUT also ye, whos who of leaks, raichu has a 90% leak accuracy for his leaks (that he was the first to leak).
More recently, IIRC he was the first to leak about raptor lakes exact larger l2 size
And he got the cb20 ST and MT scores of the 12900k to a 95 and 90 percent accuracy (if you consider the 12900ks he wouldve been more accurate, considering his estimate was on the upper end), at a time where no other leaker thought the 12900k was going to even beat the 5900x marginally.
Meanwhile, no offense to Xeno, but he wasn't included on the who's who of leaks, and tbh just doesn't have as big of a reputation as Raichu (though ofcourse reputation isn't everything).