Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E08 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (20A)Arrow Lake (N3B)Arrow Lake Refresh (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop OnlyDesktop & Mobile H&HXDesktop OnlyMobile U OnlyMobile H
Process NodeIntel 4Intel 20ATSMC N3BTSMC N3BTSMC N3BIntel 18A
DateQ4 2023Q1 2025 ?Desktop-Q4-2024
H&HX-Q1-2025
Q4 2025 ?Q4 2024Q1 2026 ?
Full Die6P + 8P6P + 8E ?8P + 16E8P + 32E4P + 4E4P + 8E
LLC24 MB24 MB ?36 MB ??8 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

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poke01

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Mar 8, 2022
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So with Intel saying it’s faster in core performance than X Elite and AMD does that mean it will be in between M3 and X Elite in terms of ST?

That’s a good jump from MTL
 

SpudLobby

Senior member
May 18, 2022
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20-30% lower power consumption vs. Snapdragon Elite and Phoenix for CPU purpose built for power consumption.

Well, it's not bad, but I was expecting bigger differences.
Vs 8Cx Gen 3* and just 20%

Not Snapdragon X Elite or Snapdragon X Plus. And keep in mind this Lunar Lake part is on N3B, and the 8cx Gen 3 was on Sammy 5nm. So lol.
 

SpudLobby

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May 18, 2022
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adroc_thurston

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Jul 2, 2023
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SpudLobby

Senior member
May 18, 2022
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A bit.

HPT isn't kilobuck+ le AIPC materiel.
X Plus starting at $999 even from MS? But yeah Hawk Point will get a bit lower.
Very much measurably so. Good effort on Intel part; perf's just unremarkable.
Better than MTL I believe - I might even buy one because of compatibility. Better than SDXE? Skeptical it’ll be enough to matter. But a good effort from Intel to improve? I believe that.
very well
Hope so!
 

Thunder 57

Platinum Member
Aug 19, 2007
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Looks interesting other than that silly slide that included "faster". My guess is that means the cores won't be all that much faster, but the perf/watt looks to be much better. I expect it to do well in low power/battery life areas.

It's also pretty crazy how quickly they are moving on this. It feels like we just got MTL, and now we are looking at LNL in time for back to school season perhaps? Not quite as fast as Broadwell to Skylake IIRC, but still impressive. Now if Intel could just give us some fresh news on ARL, that's be super nice. It seems its been awhile since both Intel and AMD have kept things quiet so close to launch.
 

AMDK11

Senior member
Jul 15, 2019
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Saying FP/ALU portion increased by 100% is misleading. If anything they put FP in separate ports from the ALUs. However the gain is likely small, because they typically aren't utilized full all the time thus sharing ports reduces transistor count thus die and power. Since CPUs have been forever limited by power, it further reduces the impact. Of course analysis is likely redone every generation.

Also specifically about the Lion Cove+ as some calls it for Lunarlake, some were talking about an extra cache level called L0. So that might be the extra block rather than separated L2 blocks.

I think you're also missing something on the uop width portion with the drastic increase to 14, understandable since Intel said nothing about Lion Cove. It would be nice to see a 30% uarch gain to counter rumored 10% clock loss but many reputable leakers and insiders did not seem to be positive in terms of Lion Cove for performance so the typical 20% figure is likely.

So I'd temper the expectations down a bit. But the Zen 5 guys are also prepared to be disappointed with the latest rumored performance gains lower than high level architectural gains. Maybe both are sandbagging, or maybe both will disappoint.

@Henry swagger Gracemont already beats Skylake in Integer, and it would be a disappointment to see only 16-18% gain since Crestmont is already 4-6% faster. In fact to live up to previous gains, Skymont should be 30% on TOP of Crestmont, and that'll get us to roughly Golden Cove, beating it noticeably in Integer and losing significantly in FP.
I understand what you are saying that going from 3x FP-ALU and 2x ALU to 4x FPU and 6x ALU, i.e. + 2x more, is misleading. I am aware of this. What I mean is that in LionCove there will be 2x more ALU + FPU execution ports, so a total of 10 instead of 5, which does not necessarily mean a greater increase in IPC than ~20%.

It would be surprising if these additional 4 FP ports turned out to be separately scheduled FP-ALUs, resulting in as many as 10 ALUs. But this is more wishful thinking than reality.

As for the split L2, there have been rumors that the L2 in LionCove is 512KB + 2.5MB, so it would fit this theory.

L0 is rather close to the Front-End.

As for the 24 uops from the decoder and cache (L0), it is an increase of 71% compared to 14 in GoldenCove, but at the moment it is difficult to say clearly how much of it falls on the decoder.

the rumors talked about Dispatch wide 8 but did not directly refer to the width of the decoder.
 

TESKATLIPOKA

Platinum Member
May 1, 2020
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I hope they are sandbagging GPU perf or Timespy is a worst case scenario for BMG (as it was a best case scenario for ACM), because 1.5x with double Xe Cores/ALUs is a bigger disaster than even RDNA3.
780M is barely better than 680M, so 50% increase for BMG and that at 17W TDP can't be called as a bigger disaster than RDNA3.

But what's important is performance in games as we all know Intel's IGPs were always performing above their actual gaming performance in TimeSpy.
 

Kepler_L2

Senior member
Sep 6, 2020
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780M is barely better than 680M, so 50% increase for BMG and that at 17W TDP can't be called as a bigger disaster than RDNA3.

But what's important is performance in games as we all know Intel's IGPs were always performing above their actual gaming performance in TimeSpy.
No, this would be the equivalent of 12 CU Phoenix vs 6 CU Rembrandt.
 
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