Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[Kepler_L2]

View attachment 100005
A little more info is trickling out…

Enhance!

 

[Mopetar]

Lenovo even has a section on "AI Gaming PCs"

If developers start taking advantage of the hardware it would be amazing. Most games have terrible AI and make the game harder by letting the AI cheat or just giving them bigger health bars and more damage.

I'd love to see AI that can compete with a human player without those advantages, but is also adaptable so that the game remains interesting or even helps the player improve by giving them a better opponent as they become more skilled at playing against the AI.

That's far more interesting to me than 99% of what they're trying to sell the AI as right now.

 

[Saylick]

Enhance!

I try.

 

[CouncilorIrissa]

If developers start taking advantage of the hardware it would be amazing. Most games have terrible AI and make the game harder by letting the AI cheat or just giving them bigger health bars and more damage.

I'd love to see AI that can compete with a human player without those advantages, but is also adaptable so that the game remains interesting or even helps the player improve by giving them a better opponent as they become more skilled at playing against the AI.

That's far more interesting to me than 99% of what they're trying to sell the AI as right now.

I don't think NPUs will be of any help with that.

 

[jpiniero]

I don't think NPUs will be of any help with that.

Yeah. AI has become such a buzzword that it's lost all meaning.

 

[Henry swagger]

I try.
View attachment 100006

Hope we get a full reveal at computex

 

[Wolverine2349]

If developers start taking advantage of the hardware it would be amazing. Most games have terrible AI and make the game harder by letting the AI cheat or just giving them bigger health bars and more damage.

I'd love to see AI that can compete with a human player without those advantages, but is also adaptable so that the game remains interesting or even helps the player improve by giving them a better opponent as they become more skilled at playing against the AI.

That's far more interesting to me than 99% of what they're trying to sell the AI as right now.

Would like that too. I like that kind of AI advance in game situations and that is where advanced AI belongs and should stay locked into a game engine However AI especially self aware in real life gives me Terminator and Skynet vibes and also threatens human dignity in other ways such as destroying and taking our skills to all automation and scares me.

 

[dullard]

I don't think NPUs will be of any help with that.

Why not? There are teams of people doing exactly that right now. Once AI gets good enough, just have those be the NPCs.
https://towardsdatascience.com/how-...ames-deep-reinforcement-learning-28f9b920440a

https://www.newscientist.com/articl... at Google DeepMind,video feed from the game.

 

[Henry swagger]

https://twitter.com/x/status/1796203476525199793

So jim Keller work on darkmont or arctic wolf which are 12 wide. Ipc will be immense 🤔😁

 

[DavidC1]

I try.
View attachment 100006

-Nanocode
-Uop queue capacity
-Dependency breaking "something" I assume

My guesses seem to be correct. They alternate between expansion and optimization of the base architecture.

Silvermont - Optimization/New concepts
Goldmont - Expansion
Goldmont Plus - Optimization
Tremont - Expansion/New concepts
Gracemont - Optimization

The E cores also seems to be chasing ARM cores in some ways. Distributed schedulers, lack of SMT, etc. The pictures show the FP portion has been expanded, while it doesn't seem to have new instruction sets.

https://twitter.com/x/status/1796204125719339112

Woah...

Man, I don't think Skymont will be behind Golden Cove in neither Integer nor FP anymore. We're looking at 30-plus percent improvements in Integer and FP gains are significantly higher.

Of course it's not that black and white. Skymont seems to be getting new ideas. 10+ years of steady and consistent execution. Good job E core team.

 

[poke01]

https://twitter.com/x/status/1796203476525199793

So jim Keller work on darkmont or arctic wolf which are 12 wide. Ipc will be immense 🤔😁

It won’t be a true 12 wide. Probably uses clusters like Skymont.

 

[DavidC1]

It won’t be a true 12 wide. Probably uses clusters like Skymont.

Intel said in their optimization manual that the cluster mechanism is an effective way of widening width in the future without incurring heavy area/power penalties.

This is the same argument made 30 years ago for Athlon vs Pentium II/III, that AMD has "full decoders" while Intel has Complex/Simple. Intel beat AMD to a pulp with "simple decoder" setup using the Core 2.

Look at the C&C article about Gracemont. It has full 6-wide output. There's nothing different from the 6-wide on Golden Cove.

So Skymont is:
4 ALUs to 8 ALUs
2x 128-bit SIMD to 4x 128-bit SIMD
6-wide to 9-wide
At least 23 ports.

 

[Henry swagger]

Intel said in their optimization manual that the cluster mechanism is an effective way of widening width in the future without incurring heavy area/power penalties.

This is the same argument made 30 years ago for Athlon vs Pentium II/III, that AMD has "full decoders" while Intel has Complex/Simple. Intel beat AMD to a pulp with "simple decoder" setup using the Core 2.

Look at the C&C article about Gracemont. It has full 6-wide output. There's nothing different from the 6-wide on Golden Cove.

So Skymont is:
4 ALUs to 8 ALUs
2x 128-bit SIMD to 4x 128-bit SIMD
6-wide to 9-wide
At least 23 ports.

Crazy increase.. getting close to apple's core sizes

 

[poke01]

Look at the C&C article about Gracemont. It has full 6-wide output.

Nope, it’s a dual 3 way split.

 

[dullard]

Hyperthreading does not have full speed and (10% to 30% of that speed). It allows a 10% to 30% performance increase when using 2 threads, but the threads can just as easily be running at 65% & 65%.

That would assume equal amount of work to be done on equal priority threads. Not a common thing to happen outside of artificial benchmarks, especially not in a gaming scenario where there are many different types of tasks. It would be hard for you to convince me that NPC control, physics, graphics, explosions, inventory tracking, player input, item/player spawning, etc. are all equal priority tasks with equal amount of work to be done.

 

[Wolverine2349]

-Nanocode
-Uop queue capacity
-Dependency breaking "something" I assume

My guesses seem to be correct. They alternate between expansion and optimization of the base architecture.

Silvermont - Optimization/New concepts
Goldmont - Expansion
Goldmont Plus - Optimization
Tremont - Expansion/New concepts
Gracemont - Optimization

The E cores also seems to be chasing ARM cores in some ways. Distributed schedulers, lack of SMT, etc. The pictures show the FP portion has been expanded, while it doesn't seem to have new instruction sets.

https://twitter.com/x/status/1796204125719339112

Woah...

Man, I don't think Skymont will be behind Golden Cove in neither Integer nor FP anymore. We're looking at 30-plus percent improvements in Integer and FP gains are significantly higher.

Of course it's not that black and white. Skymont seems to be getting new ideas. 10+ years of steady and consistent execution. Good job E core team.

So Skymont e-cores will not be behind Golden Cove in IPC? SO n that case could Intel release an all e-core Arrow Lake and no hybrid arch and it would perform as well in all areas as Golden Cove? Golden Cove already has dang good IPC for modern and todays games. Maybe is it really performs as well in all facets as Golden Cove including clock speed, maybe that is the more than 8 cores on single die for non hybrid arch for gamers with much less power draw too. Could be almost like if Intel released a 10 P core Alder Lake but much less power. Or is it not that simple?

 

[DavidC1]

Nope, it’s a dual 3 way split.

Keep telling yourself that.

https://i0.wp.com/chipsandcheese.com/wp-content/uploads/2021/12/tightloop.png?ssl=1

Gracemont has a full 5-wide output, limited only by the back-end, and it's sustained unlike Golden Cove which declines to 5.5 or so. Crestmont has a 6-wide backend.

 

[DavidC1]

So Skymont e-cores will not be behind Golden Cove in IPC? SO n that case could Intel release an all e-core Arrow Lake and no hybrid arch and it would perform as well in all areas as Golden Cove?

Arrowlake has Lion Cove, which will be better than Golden Cove. Golden Cove will not be competitive with Zen 5. Also, Golden Cove has a 19-stage pipeline and likely hidden circuit tricks to make it reach ridiculous clock speeds. One of the reasons for the core being abnormally large is likely due to that. So you won't have it clock as high either.

Also @Wolverine2349, I bet on Skymont being far closer to Lion Cove in Arrowlake. The problems with scheduling improves when the worst case scenario(things like HT, and the E core) gets much better. Arrowlake is said to eliminate HT and has a better E core.

 

[Wolverine2349]

Arrowlake has Lion Cove, which will be better than Golden Cove. Golden Cove will not be competitive with Zen 5.

Also @Wolverine2349, I bet on Skymont being far closer to Lion Cove in Arrowlake. The problems with scheduling improves when the worst case scenario(things like HT, and the E core) gets much better. Arrowlake is said to eliminate HT and has a better E core.

Yeah but Golden Cove is still really good even by today's standards and if Intel had a 10-12 P core Golden Cove I think gamers would have purchased it in droves and not intended to upgrade anything but video cards for years and be set.

If the new Arrow Lake Skymont e-cores truly have as good of latency and clocks as Golden Cove, that would be awesome. Though needs to be client ring bus Golden Cove performance, not the crappy latency gimped Xeon SPR Golden Cove which has much worse IPC than desktop versions.

Golden Cove will lose to Zen 5 yes, but it still slightly beats Zen 4 in clock normalized IPC and Zen 4 is still quite good.

Unless they cripple latency or something like they did with Sapphire Rapids Xeon Golden Cove.

Or better yet yes Intel just put 12 Lion Cove P cores on a die and best of best newest arch all P core IPC not Golden Cove more than 8 core IPC 3 years too late.

That is if Intel even releases a Skymont only one or if not, you can disable all P cores and have only Skymont cores.

With 12th to 14th Gen, it is not possible to disable all P cores and use only Gracemont cores. Does anyone know if that is an artificial limitation from Intel and mobo makers, or is it true that Gracemont e-cores are not capable of running on their own without P cores as they lack certain instructions? Or can Gracemont run themselves and boot, Intel and mobo makers just do not want people doing it thus not allowed?

 

[DavidC1]

Yeah but Golden Cove is still really good even by today's standards and if Intel had a 10-12 P core Golden Cove I think gamers would have purchased it in droves and not intended to upgrade anything but video cards for years and be set.

I often edit way after I post, so go read again. The E cores are still behind in clocks.

 

[poke01]

Keep telling yourself that.

https://i0.wp.com/chipsandcheese.com/wp-content/uploads/2021/12/tightloop.png?ssl=1

Gracemont has a full 5-wide output, limited only by the back-end, and it's sustained unlike Golden Cove which declines to 5.5 or so. Crestmont has a 6-wide backend.

“enabling two concurrent streams of decode that could support 3 per cycle. That still remains in Gracemont”
From Annadtech.


all I am saying is this is not a true a 9 wide decode for Skymont and its via 3x3 clustered design and it’s a design choice as you said.

 

[SiliconFly]

The thing has no chances against anything Zen5.

With the kind of intel performance & efficiency leaks coming in, Lisa should just sell AMD and retire.

 

[Elfear]

Arrowlake has Lion Cove, which will be better than Golden Cove. Golden Cove will not be competitive with Zen 5. Also, Golden Cove has a 19-stage pipeline and likely hidden circuit tricks to make it reach ridiculous clock speeds. One of the reasons for the core being abnormally large is likely due to that. So you won't have it clock as high either.

Also @Wolverine2349, I bet on Skymont being far closer to Lion Cove in Arrowlake. The problems with scheduling improves when the worst case scenario(things like HT, and the E core) gets much better. Arrowlake is said to eliminate HT and has a better E core.

Bodes well for some very impressive MT performance with Arrowlake.

 

[DavidC1]

all I am saying is this is not a true a 9 wide decode for Skymont and its via 3x3 clustered design and it’s a design choice as you said.

And I'm telling you in the big picture it's little more than semantics. You could still make the case with Golden Cove having all "simple decoders" it's not a true one like in ARM or even with AMD.

Actual measurements tell you otherwise and real world instructions are more than few bytes. There was a google research saying we still got lot more to go before expanding decode is useless.

Golden Cove has 6-wide decode with decoders and 8-wide sometimes with the uop cache. Gracemont with 3x3 is going to end up better in the all-important Integer by quite a bit. Not a coincidence either I bet.

 

[SiliconFly]

I often edit way after I post, so go read again. The E cores are still behind in clocks.

Yep. It's kinda sad when people mix up IPC with overall performance. We can't expect skymont or any other monts for at least one or two more generations to have real world performance comparable to GLC.