Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[moinmoin]

A properly balanced core won’t have the resources for SMT.

Are you talking about an old in-order Atom core, or what's your idea of a "properly balanced core"? Any modern core factually lacking resources that could be used by SMT is pure fantasy talk. All the extensions and accelerations ensure that there are always resources within a modern core that are completely unused without SMT.

Historically SMT was created for the fact that there are plenty unused resources in a core (most basic one being FP unit being unused when an INT workload is being computed and vice versa, now think of all the extensions and specific optimizations on top of that) at a time where there were neither many cores to begin with nor power gating fine grained enough to shut off all unused resources. So the introduction of SMT both increased throughput through better usage of existing resources as well as increasing overall power efficiency due to powered-on but idling resources now actually being able to do some work.

Now removing SMT may actually increase power efficiency once power gating is fine grained enough to shut off all unused resources at any time. At that point just adding more cores may offer better efficiency at more predictable performance.

But Intel's move to me doesn't look to be due to that.

 

[poke01]

Now removing SMT may actually increase power efficiency once power gating is fine grained enough to shut off all unused resources at any time.

Apple introduced excellent power gating in the A13 chip.

We will have see how Lion cove and skymont are like.

 

[Khato]

SMT doesn't cost any die area (more or less).

That's an incorrect assumption. It's probably on the order of a 10-15% increase in die area on current generation processors.

And the benefit of SMT is entirely dependent on the workload. If the workload has multiple threads each using independent CPU resources then sure, SMT can increase performance and power usage accordingly. If it's a homogenous workload though where all threads use the same CPU resources then the only benefit is the ability to quickly swap from a stalled thread through to the other. It's still beneficial, but perhaps not adequately so to justify the area cost.

 

[Hougy]

In retrospect (or not for me) I always thought it was hilarious people got so excited about strange BS like SMT4 as opposed to just throwing more e cores at the problem and a bigger ST “big” core to handle beefier out of order code. It’s obvious which way the wind has been blowing and somewhat clear why.

E cores weren't in the radar at the time

 

[adroc_thurston]

That's an incorrect assumption

I'm quoting ThunderX3 (Triton) architects and they certainly know it better than you; shipped (kinda) 2 gens of SMT4 chips and all.

 

[Khato]

I'm quoting ThunderX3 (Triton) architects and they certainly know it better than you; shipped (kinda) 2 gens of SMT4 chips and all.

The ~5% cost that was quoted in the ThunderX3 HotChips presentation is not nothing.

You are correct in that I don't work on CPU cores. Which is part of why I wasn't adequately specific in my statement - should have been 10-15% increase in CPU core die area. You can make SMT appear less costly by including caches and everything else in the SoC in the figure, which appears to be what was done in the ThunderX3 presentation.

 

[adroc_thurston]

which appears to be what was done in the ThunderX3 presentation

No it's just the core.
SMT is cheap on area, taxing on validation.

 

[Exist50]

Honestly I’d take their chiplet partitioning over AMD’s with the CPU split up, but they could probably do well to merge a few things e.g. maybe IO and SoC or all three and the GPU.


What’s the SoC rumor?

The partitioning is probably not ideal, but it's not terrible either. The problem with the SoC is they fundamentally switched the fabric, but what they switched to wasn't ready for such a use case, plus they had to shoddily bolt the old interfaces on.

The chiplet cutlines are interesting. I think separate graphics tile makes a lot of sense. Splitting the CPU is a mixed bag. Power/performance overhead, but it also allows them to do something like ARL with a low effort die swap. Hindsight is 20/20, but the process issues would probably have been much more concerning if they had to have HSIO on Intel 4 as well. The SoC cores are a good idea, but implementation dependent.

Oh, and as for the IO die, that was a last minute addition because they didn't have the shoreline/beachfront for all the IO breakout they needed.

 

[Exist50]

Yes, I had my doubts whether Intel would regain node leadership but that looks very unlikely.

Fwiw, I'm pretty sure that 20A ARL is still on the roadmap. We'll see what happens over the next year or two, but I think it's very premature to call it dead.

Note that this is for HP libraries. HD libraries are higher, but typically not suitable for high performance chips. Numbers are theoretical for both companies. Hopefully I made no errors copy pasting on mobile.

I think @SpudLobby nailed the criticisms of that metric, but there's one thing I'd like to add. You're quoting numbers that represent basically the densest possible arrangement of cells, with no regard for routing congestion. Yet in real designs, and especially on modern nodes, that's a huge problem, and doubly so for high speed designs like a CPU core. Even the best (Apple) only get like 80% theoretical transistor density. Historically, Intel's been more like 50%. And this is a combination of design, process, and tools, so very hard to isolate.

I think he might actually be right though. If Zen 5 for mobile is on N4P and Lunar Lake is on N3, ARL 20A, my thought had been the exact same, they’ll have a mobile process advantage.

I think the comment was in the context of Intel vs TSMC node availability, but if we're talking about what products actually use, Intel might indeed have an edge in some markets. Net for net, I think the two will be pretty evenly matched going forward, but that will be far better than Intel's been dealing with.

Desktops I suspect AMD will go N3 and servers the same of some kind for 5C. But for mobile it’s shaking out to be Intel regaining a process advantage, no?

If Lunar Lake comes even close to its goals (huge "if"), then it should be significantly better than anything AMD will have in that product category. But I'll withhold judgement until there's real silicon.

 

[Exist50]

I remain skeptical, but if ARL does in fact not have hyperthreading, how will that affect gaming? As far as I know games dont really use the e cores, but does gaming us the hyperthreaded "cores" on the P cores? Seems to me that loss of hyperthreading could be a big problem for gaming, and I though ARL was supposed to be a gaming focused architecture. Seems like eventually Intel is going to have to figure out how to offload gaming (at least some tasks of it) to the e cores if they are to remain competitive.

In Alder/Raptor Lake, SMT threads come after the E-cores in priority. That is, they won't be used unless all the E cores are occupied, which would be a very rare occurrence in gaming. All said and done, I doubt the loss of SMT will have any impact on gaming performance. What it will definitely hurt, however, is rendering workloads/benchmarks like Cinebench.

 

[adroc_thurston]

Fwiw, I'm pretty sure that 20A ARL is still on the roadmap.

mucho noexisto

then it should be significantly better than anything AMD will have in that product category

AMD makes no tablet parts anymore so.
The actual Strix1 will be unrivalled in its category with maybe 8cx g4 being the same-ish ballpark is we're lucky.

 

[Exist50]

mucho noexisto

I don't want to belabor the point, but I do think you're just mistaking them moving that die around the roadmap. But if it's canceled, we would hopefully hear something during their earnings report.

AMD makes no tablet parts anymore so.

Well, LNL will primarily be in laptops. It's an Apple M-series competitor. I've been saying for a while now that AMD really needs a fanless ~10W part. They have all the IP needed. Just need to get the platform priories in order.

 

[adroc_thurston]

but I do think you're just mistaking them moving that die around the roadmap

No they really unexisted it as far as I see it.
N3-only for now at ARL.

Well, LNL will primarily be in laptops

Conceptually it's a tablet chip just like Apple's AwhateverX rebages.

I've been saying for a while now that AMD really needs a fanless ~10W part

They don't think they need one at all.
Not even remotely planning those.
Not even on the farthest horizon.

 

[Exist50]

On the topic of the merits of SMT, I think the big question is what they're going to do for servers. GNR is RWC, so that's fine, and they haven't talked about a big core server product (Diamond Rapids?) despite naming Clearwater Forest in 2025, so it's possible we don't see DMR till 2026. That gives them 1-2 gens to either add back SMT (either for everything, or a dedicated server fork), or find some replacement solution. Because the loss of SMT, all else equal, will definitely hurt them in throughput efficiency (both area and power), plus with any CSP renting out virtual cores (fewer units per chip).

For client, now that there's a bunch of E cores, I think things are fine either way. Don't need a million threads for client chips.

 

[Exist50]

No they really unexisted it as far as I see it.
N3-only for now at ARL.

Then we'll see who's right. Though it'll be a boring wait.

Conceptually it's a tablet chip just like Apple's AwhateverX rebages.

Sure, same thing at the end of the day. But in practice, I expect more laptops than tablets with it. Semantics though.

They don't think they need one at all.
Not even remotely planning those.
Not even on the farthest horizon.

That would be very disappointing. People clearly love having cool, powerful, fanless devices. I'm typing this on an M1 Air myself. Would be a waste of a good opportunity.

 

[adroc_thurston]

That would be very disappointing

Fanless is a meme segment, most people really dgaf whether there's a fan or not.
Like, new MBPs have fans but they're usually pretty silent due to sane fan curve tuning.

People clearly love having cool, powerful, fanless devices

No they like their entry-level Macbooks.
And Mac revenue cratered anyway so.

Would be a waste of a good opportunity.

They're considerably more interested in GPGPU wars than spending manpower on chasing memey low-revenue segments.

 

[Exist50]

And Mac revenue cratered anyway so.

Everyone's revenue cratered. And the Air lineup sells extremely well, and gets great user reviews.

They're considerably more interested in GPGPU wars than spending manpower on chasing memey low-revenue segments.

Porque no los dos? AMD should be at the point where they don't have to trade off one market for another.

 

[adroc_thurston]

Everyone's revenue cratered

Apple harder than the others, check Q1 PC breakdowns.
While LNL 443 in vacuum will be an interesting product I doubt it will be a market-maker or anything.
gives me 8cx g4 vibes lol

AMD should be at the point where they don't have to trade off one market for another.

well they're not trading mobile off for GPGPU, it's just that chasing 10W toys isn't a priority for them at this point.
Manpower better spent elsewhere.

 

[SpudLobby]

Fwiw, I'm pretty sure that 20A ARL is still on the roadmap. We'll see what happens over the next year or two, but I think it's very premature to call it dead.

I think @SpudLobby nailed the criticisms of that metric, but there's one thing I'd like to add. You're quoting numbers that represent basically the densest possible arrangement of cells, with no regard for routing congestion. Yet in real designs, and especially on modern nodes, that's a huge problem, and doubly so for high speed designs like a CPU core. Even the best (Apple) only get like 80% theoretical transistor density. Historically, Intel's been more like 50%. And this is a combination of design, process, and tools, so very hard to isolate.

I think the comment was in the context of Intel vs TSMC node availability, but if we're talking about what products actually use, Intel might indeed have an edge in some markets. Net for net, I think the two will be pretty evenly matched going forward, but that will be far better than Intel's been dealing with.

If Lunar Lake comes even close to its goals (huge "if"), then it should be significantly better than anything AMD will have in that product category. But I'll withhold judgement until there's real silicon.

Agreed RE: responses and good point on density with routing, I couldn't really go over all of it earlier but man it gets tiring seeing the extrapolations from peak figures (be it power, density of some libraries, etc, because yields, effective density blah blah all count in practice). It's just not as meaningful as people want to believe at least alone.

ARL I think is interesting. I am just slightly more interested to see it than LNL if only because I want to see what 20A performs like, even though it will be a bit leakier and less very low power optimized, more traditional 20+W. But it should still be quite good, if it pans out and could put Intel in a position of at least trading blows in a way Meteor Lake I think won't quite get to.

But I totally agree that there's no going back to e.g. 2008, 2015 or whatever, yep. AMD and Intel will likely be fairly evenly matched and the 28-60W laptop market - and (small but alive) DIY desktops or some HPC servers - is where I expect this to be most obviously true.

On LNL: Yep. If they can pull of a 4+4 part with a denser design on N3E/S that likely amounts to an M1/2 clone from Intel in terms of microarchitecture, system design choices, library choices, then yeah I think they will have a real advantage over AMD for ultrabooks in a limited sense. I still don't think AMD actually seems to understand low power as well as Intel as bizarre as that sounds, though maybe "care" is the better word.

 

[Tigerick]

Apple harder than the others, check Q1 PC breakdowns.
While LNL 443 in vacuum will be an interesting product I doubt it will be a market-maker or anything.
gives me 8cx g4 vibes lol

well they're not trading mobile off for GPGPU, it's just that chasing 10W toys isn't a priority for them at this point.
Manpower better spent elsewhere.

Yep, 443 config will be pretty big departure from Intel by emphasing GPU die area. Apple and Qualcomm are also going to offer similar configs (I actually made a comparison table between upcoming M3 and 8cx G4 here). That's why AMD would be foolish not to join the fight for future ultraportables and tablet, maybe upcoming Kracken are meant for such configurations?

 

[SpudLobby]

I don't want to belabor the point, but I do think you're just mistaking them moving that die around the roadmap. But if it's canceled, we would hopefully hear something during their earnings report.

Well, LNL will primarily be in laptops. It's an Apple M-series competitor. I've been saying for a while now that AMD really needs a fanless ~10W part. They have all the IP needed. Just need to get the platform priories in order.

Oh lol I just scrolled up and saw this. In my previous response I pointed out this RE: AMD and low power, agreed. Of course the 10W in practice is higher, it's more in principle about "if the TDP were capped due to thermals etc, could this perform well?" Along with low idle power sapping, etc.

Would love to see AMD try with like 6-8C Zen 5c tbh. Doubt they will though, sadly.

 

[SpudLobby]

Yep, 443 config will be pretty big departure from Intel by emphasing GPU die area. Apple and Qualcomm are also going to offer similar configs (I actually made a comparison table between upcoming M3 and 8cx G4 here). That's why AMD would be foolish not to join the fight for future ultraportables and tablet, maybe upcoming Kracken are meant for such configurations?

I saw that chart, do you have any rumors to point to on a 256-bit bus for 8cx Gen 4 parts or is that your own speculation? All we've heard about is 128B only.

 

[Tigerick]

I saw that chart, do you have any rumors to point to on a 256-bit bus for 8cx Gen 4 parts or is that your own speculation? All we've heard about is 128B only.

There is link above the chart showing leaks from Twitter about that and I made some modifications..

 

[adroc_thurston]

I still don't think AMD actually seems to understand low power as well as Intel as bizarre as that sounds, though maybe "care" is the better word.

Yes, they don't care about 10W parts.

That's why AMD would be foolish not to join the fight for future ultraportables and tablet

They always do their own thing.

maybe upcoming Kracken are meant for such configurations?

mucho noexisto.

Would love to see AMD try with like 6-8C Zen 5c tbh

Why would anyone leave premium cores out?
lol
Compacts are for area eff MT grunt and not much else.

 

[Kepler_L2]

AMD makes no tablet parts anymore so.

Well there's still PHX2e/Bandit Crest, unless that has been cancelled recently.