Iris pro benchmarks are in, and........they're VERY GOOD

[TerryMathews]

If you try educate people. Please stick to the rest of reality as well.

AMD delayed 65nm because they was confident in their lead and wanted to milk the process node further.
AMD didnt expand capacity, because they only wanted the premium segment.
AMD delayed and reduced R&D, because they was confident that Intel would never catch their K8.
AMD wasted all its savings on ATI.

Then you can blame Intel as much as you want for the rest.

Serious question: would the ATi purchase have been less expensive as a portion of corporate capital, if Intel had not engaged in illegal business practices?

I think we both know the answer.

 

[ShintaiDK]

Serious question: would the ATi purchase have been less expensive as a portion of corporate capital, if Intel had not engaged in illegal business practices?

I think we both know the answer.

The answer is no. AMD was capacity constrained, and they made sure users knew it with their extortionary high prices. And they bought a bubbled ATI. ATI stockholders are still heard laughing every time they check their bank accounts.

You seem to try search for an excuse thats not there.

And talking about illegal business practices. Who was it again that got caught with insider trading?

 

[insertcarehere]

Serious question: would the ATi purchase have been less expensive as a portion of corporate capital, if Intel had not engaged in illegal business practices?

I think we both know the answer.

The ATI acquisition should not have happened in the first place, considering that it was purchased for way over market value, and put AMD in tons of corporate debt.

 

[Dresdenboy]

If you try educate people. Please stick to the rest of reality as well.

AMD delayed 65nm because they was confident in their lead and wanted to milk the process node further.
AMD didnt expand capacity, because they only wanted the premium segment.
AMD delayed and reduced R&D, because they was confident that Intel would never catch their K8.
AMD wasted all its savings on ATI.

Then you can blame Intel as much as you want for the rest.

When a thief screams "Thief!".

I don't remember a smooth 65nm ramp. Back then there was a leaked die photo which had more space between single units if the core, which also meant a larger die than probably necessary, lowering yields and gross die per wafer up front.

I also didn't see AMD holding back R&D. They had huge debts and keeping R&D in check helps reducing them or slowing their growth. The scrapped designs were more of a problem, wasting money and human resources pursuing wrong paths.

Adding fab capacity also doesn't come without huge costs.

W/o ATI or Nvidia (they approached them first) they'd not sell much today. Maybe some FX and low power embedded CPUs (Bobcat has been started at around the same time as Bulldozer). No PS4, no APU, no XBone. Take that off the quarterly uP market reports.

 

[insertcarehere]

I also didn't see AMD holding back R&D. They had huge debts and keeping R&D in check helps reducing them or slowing their growth. The scrapped designs were more of a problem, wasting money and human resources pursuing wrong paths.

How did you think AMD suddenly acquired huge amounts of debt?

W/o ATI or Nvidia (they approached them first) they'd not sell much today. Maybe some FX and low power embedded CPUs (Bobcat has been started at around the same time as Bulldozer). No PS4, no APU, no XBone. Take that off the quarterly uP market reports.

Except we also need to consider the opportunity cost of buying Ati, more R&D funds could well have made AMD much more competitive products in the desktop, laptop and more importantly, server space over the last couple of years. These are relatively high-margin products that were hemorrhaging marketshare to Intel. (laptops slightly resurging)

 

[Arkaign]

For that to be true Intel would have to be lying through their teeth when they say Crystalwell gets an average 95% hit rate in games. That would make the backing RAM technology close to irrelevant, especially for average FPS.

95% hit rate doesn't really mean much though does it? It only means that the data that IS in the cache is used well. However, we don't see 128MB GPUs that also rely on system DDR3 on the desktop as being competitive in any meaningful way.

That kind of setup is ALWAYS a low end solution, and never as good as a complete pool of dedicated local memory to the GPU.

I'm not denying it helps the Iris in the context of what they have to work with, but follow me here :

Iris Pro w/128MB eDRAM + DDR3 1600 system memory

vs.

Iris Pro w/8GB DDR4-2800 shared main system memory and no eDRAM

vs.

Theoretical Iris Pro discrete with 2GB GDDR5 6Gbps 384-bit interface

Which would dominate? The GDDR5 variant, easily. What next? The DDR4 variant. The DDR3 + eDRAM would easily be the last-place contender.

The only reason they're doing that is because designing a special mobo chipset for Iris Pro with a dedicated 256-bit memory bus to solder GDDR5 onboard would be silly, and very hard to ask OEMs to do in the context of the ultrabook form factor.

eDRAM is a bandaid, a way to boost GPU performance a bit when they're saddled with crappy slow main system memory. But it's far too small to truly equal a good dGPU and GDDR5 large enough to handle AAA gaming on the same level.

Think about it : you have 128MB to work with. What happens when you need to move data into that 128MB that's not already there while you're playing BF4? Yes, it has to come from that crusty old DDR3, which is already shared with the rest of the platform. So your magical superfast eDRAM is suddenly bottlenecked by DDR3-1333, 1600, whatever. Even DDR3-2133 sort of sucks for video honestly. A low end GDDR5 7770 blows the crap out of any IGP on earth.

 

[Blitzvogel]

Too bad that Intel will most likely beat AMD to stacked memory and DDR4 support, but holy damn it would be interesting if AMD actually managed to beat Intel to it.

I'm still holding out for at least desktop Kaveri to be triple channel (I can dream right?).

Also I can't help but say how annoyingly Intel deployed the 40 EU IGPs.

 

[seitur]

Most interesting thing memory wise for future IGP/APU and dGPU is GDDR6 actually. Meaning what design philospohy will be behind it. I think it'll be tad diffrent than GDDR5 in certain aspects, rather than simple 'moar performance' evolution.

 

[rootheday3]

95% hit rate doesn't really mean much though does it? It only means that the data that IS in the cache is used well. However, we don't see 128MB GPUs that also rely on system DDR3 on the desktop as being competitive in any meaningful way.

To understand performance of computers, you have to understand bandwidth and latency of the memory system (including caches along the way) AND temporal coherence/locality of reference (to know how often you hit the caches) AND latency hiding of the compute engine (how much latency stall penalty can you tolerate).

Typically for a given workload there is some flops/memory bandwidth ratio that is required. However, if 90% of that memory bandwidth demand is satisfied from local caches, the final system memory bandwidth demand can be much less.

The reason dGPUs have to have huge local memory is because any "miss" from that local memory requires accessing the PCIe bus (high latency, low bandwidth=8 GB/s for 16x gen2) to the CPU and then another hop to main memory (high latency, low bandwidth=25 GB/s for dual channel DDR3 @ 1600). They simply don't have enough latency hiding to tolerate that. Remember that drivers have to copy all the vertex buffers, texture data, etc across that bus to load the local memory from system memory - updating portions of that data on every frame (vertex data for moving objects, streaming textures).

for Iris Pro, there are some internal caches inside the GPU (probably 10-100K @ extremely high bandwidth and single digit clk latency) for texture sampler, parts of the pixel backend, etc. Requests spill out of this all the time. Then there is the so-called LLC (cpu L3) which is 6MB @ 250-500GB/s @ 40 clks - things like the depth buffer, render targets, etc would be selected for caching here. eDRAM is 128MB @ 60 GB/s with slightly higher latency. For any given draw call in a scene, nearly all the textures etc would fit in that cache. The only time the system memory bandwidth comes into play is for accesses that miss that entire hierarchy or for giant streaming accesses (copy operation) that have no locality of reference at all.

Intel said that their analysis indicated 32MB of eDRAM was enough to give enough memory bandwidth to avoid starving the GPU for nearly every game. The bump to 128 was "future proofing" and a desire to not be caught short on the first go with this technology. As Intel get's comfortable with this, I would expect that future versions of Intel cpus would have LESS eDRAM (32MB-64MB) to help with cost/power - and then push it down into lower price points and ultrabook skus.

 

[Erenhardt]

The reason dGPUs have to have huge local memory is because any "miss" from that local memory requires accessing the PCIe bus (high latency, low bandwidth=8 GB/s for 16x gen2) to the CPU and then another hop to main memory (high latency, low bandwidth=25 GB/s for dual channel DDR3 @ 1600).

What kind of Stone Age device is that? DMA comes into play and it is not as bad as you try to make it look. The latencies are bad, but there is no data jumping back and forth GPU>CPU and CPU>RAM>

eDRAM is 128MB @ 60 GB/s with slightly higher latency. For any given draw call in a scene, nearly all the textures etc would fit in that cache. The only time the system memory bandwidth comes into play is for accesses that miss that entire hierarchy or for giant streaming accesses (copy operation) that have no locality of reference at all.

Good luck with that! Maybe with 1440x720 and texture detail on low. That kind of explain why it sucks in HD resolution and good quality textures

 

[USER8000]

Too bad that Intel will most likely beat AMD to stacked memory and DDR4 support, but holy damn it would be interesting if AMD actually managed to beat Intel to it.

I'm still holding out for at least desktop Kaveri to be triple channel (I can dream right?).

Also I can't help but say how annoyingly Intel deployed the 40 EU IGPs.

The PS4 uses stacked GDDR5 it seems. The main problem is whether it would make financial sense for AMD to introduce it for their APUs,especially considering what price ranges they are targetting with them.

 

[NTMBK]

The PS4 uses stacked GDDR5 it seems. The main problem is whether it would make financial sense for AMD to introduce it for their APUs,especially considering what price ranges they are targetting with them.

Source? I've not seen anything indicating stacked memory.

 

[USER8000]

Source? I've not seen anything indicating stacked memory.

Plenty,actually. Read about the work done between Amkor,Hynix,AMD and Sony. This has been around for ages,and enough of it points towards such work being used in the PS4.

Here is an old one two years ago hosted on the AMD website:

http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf

It talks about stacking with an APU and there are pictures from around the same time showing,a prototype AMD chip using it(not the PS4 SOC of course). There are more recent documents,of course,but its shows AMD has been working with Amkor for a while.

Another one:

http://www.i-micronews.com/upload/Rapports/3D_Silicon_&Glass_Interposers_sample_2012.pdf

There is also a document from Amkor which mentions Sony as a customer too,and talks about consoles as a usage scenario for the 2.5D stacking they are suggesting. I need to find it.

Looking at the pieces,it would suggest the PS4 does use it in some way,to simplify packaging and it would sort of fit the whole SOC mantra,Sony has pushed with the PS4.

 

[Dresdenboy]

IIRC they postponed introduction of this tech.

Further the leaked PS4 docs show "classic" GDDR5 channels with plausible transfer rates. Stacked memory - either on some interposer or on die using TSVs (might get thermal problems) - would have much higher BW.

 

[Blitzvogel]

The PS4 uses stacked GDDR5 it seems. The main problem is whether it would make financial sense for AMD to introduce it for their APUs,especially considering what price ranges they are targetting with them.

I think it would depend on the market they aim for. I'm not sure how much real demand there is for APUs in the server market, but I would reckon that a server APU is certainly not worthless, especially a hUMA style one a la Kaveri. There you can charge those higher prices that on-die stacked memory APUs would command, and it would alleviate pricing in the desktop and mobile markets. I'm still wondering if the PS4's APU will see the light of day in servers for scientific computing or what have you. Seems a rather good fit, though I would see Kaveri with 1024+ SPs being a better fit

AMD has much more to do before they can purely take on Intel. If they can get common ISAs somehow working natively on the graphics SIMDs, then I think they'll have a real case versus Intel in certain market segments. I honestly don't know if that's even realistic (I'm not a computer science major), but it makes sense to me.

 

[rootheday3]

What kind of Stone Age device is that? DMA comes into play and it is not as bad as you try to make it look. The latencies are bad, but there is no data jumping back and forth GPU>CPU and CPU>RAM>

I didn't say the cpu core's were touching the data... I meant "host memory controller" (which happens to be integrated into the CPU). DMA or not, the latencies would be very bad for ANY DATA NOT IN THE DGPU local memory. To avoid falling off a performance cliff, dGPUs have to a large amount of local memory. With the memory hierarchy of Iris Pro, there isn't such a catastrophic fall off.

Good luck with that! Maybe with 1440x720 and texture detail on low. That kind of explain why it sucks in HD resolution and good quality textures

Go back and check the benchmarks at notebookcheck, pclab, etc. Iris Pro does fine at full 19x10 HD at medium to high settings on almost every game. As long as you don't go crazy with MSAA or "ultra" settings that hammer performance with negligible visual benefit and you should be able to have a good gaming experience.

 

[NTMBK]

Plenty,actually. Read about the work done between Amkor,Hynix,AMD and Sony. This has been around for ages,and enough of it points towards such work being used in the PS4.

Here is an old one two years ago hosted on the AMD website:

http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf

It talks about stacking with an APU and there are pictures from around the same time showing,a prototype AMD chip using it(not the PS4 SOC of course). There are more recent documents,of course,but its shows AMD has been working with Amkor for a while.

Another one:

http://www.i-micronews.com/upload/Rapports/3D_Silicon_&Glass_Interposers_sample_2012.pdf

There is also a document from Amkor which mentions Sony as a customer too,and talks about consoles as a usage scenario for the 2.5D stacking they are suggesting. I need to find it.

Looking at the pieces,it would suggest the PS4 does use it in some way,to simplify packaging and it would sort of fit the whole SOC mantra,Sony has pushed with the PS4.

Plenty of evidence of AMD investigating stacking, yes. Evidence of stacking in the PS4, no.

 

[Enigmoid]

Go back and check the benchmarks at notebookcheck, pclab, etc. Iris Pro does fine at full 19x10 HD at medium to high settings on almost every game. As long as you don't go crazy with MSAA or "ultra" settings that hammer performance with negligible visual benefit and you should be able to have a good gaming experience.

Intel's current bane is MSAA problems. While intel graphics can run MSAA performance generally falls off a cliff when AA is applied. But then iris isn't really powerful enough to run games at levels where you can start turning up MSAA.

ex)

Massive performance hit to intel, minor differences to amd and nvidia. (Note that on ultra Iris comes out ahead but then at 30fps on a racing game isn't at ideal settings).

Synthetic test.

Iris Pro goes from performance competitive with the GT 650M to nearly half its speed once you enable 4X MSAA. Given the level of performance Iris Pro offers, I don't see many situations where AA will be enabled, but it's clear that this is a weak point of the microarchitecture.

 

[Arkaign]

This goes back to eDRAM being a bandaid between shared slow DDR3 and dedicated fast GDDR5. Shared DDR4 should massively help all iGPUs. Just look at the boost from DDR3-1333 to DDR3-1600 or DDR3-1866. Tremendous. The gap between DDR3-1600 (common speed) to DDR4-2800 and beyond will be gigantic.

 

[bullzz]

the newer iMacs have been updated with GT3e

http://www.anandtech.com/show/7365/apple-updates-the-imac-haswell-cpus-pcie-ssds-80211ac-wifi

not sure why apple went with it in iMac. they cud have gone with 650M and cud have had a lower BOM
other interesting data Anand mentions is imac contains a 65W iris pro. have to see if the higher thermal headroom gives a performance boost

 

[ams23]

The entry 21.5" iMac uses Iris Pro. The higher-end 21.5" iMac uses GT 750M with a higher performance CPU, while the 27" iMacs use GT 755M or GTX 775M. As I mentioned earlier in this thread some time ago, most OEM's will use NVIDIA GPU's to differentiate products that contain Intel CPU's.

 

[SPBHM]

only the lower end model have the 128mb of L4 cache, this could have some interesting results (in some very specific conditions)

 

[krumme]

only the lower end model have the 128mb of L4 cache, this could have some interesting results (in some very specific conditions)

Yes one should think so. But Anand in his test couldnt find any as i recall. Do we have any actual evidence/test there is a practical effect for eg the ones using an imac?

 

[crashtech]

An optional GDDR5 module on the mobo would be one way to extend the performance capabilities of Iris Pro, if there is a niche to be filled between it and discrete solutions.

 

[sm625]

not sure why apple went with it in iMac. they cud have gone with 650M and cud have had a lower BOM

I bet apple found a way to make the BOM lower using the intel part with eDRAM vs using the nvidia part. Even if it was a tiny bit higher they can make up for that by not having to deal with supporting two different graphics subsystems. That's gotta be worth a few dollars per unit.