CL or CAS latency is the amount of time in nanoseconds or clock cycles between a request to read the memory, and when it is actually output. SDRAMs are typically referred to as CL2 or CL3, with CL2 parts being faster, from the same manufacturer.
The user, i.e. you, selects the CL in the motherboard BIOS. If the SDRAM is fast enough, it will run stable in CL2. Most of today's SDRAM comes with a EEPROM call SDP (Serial Presence Detect). The SDRAM module manufacturer load the timing information into this SPD ROM. The user can allow the motherboard to read the SPD and set the timing or CL accordingly. The user override the SPD settings when he wants to overclock.
Therefore, the user can find out what the SPD timing recommendation is by allowing the SPD to set the CAS latency. Some manufacturer, such as KingMax, publishes the SPD content in their specification sheet. There are also utility program that dump the SPD contect. SANDRA's commercial version comes with a SPD read module, SPDINFO.EXE.
The SDRAM module manufacturer or their service department can easily re-program the SDP (an EEPROM). Infineon uses 7.5 ns chips in their CL3 SDRAM. Crucial uses 7.5 ns chips in both of their CL2 and CL3 SDRAM. In most cases, the Infineon module can be pushed to higher overclock FSB at CL2.