Is a Vishera Refresh Coming?

[guskline]

The refresh is the 4 series and 6 series not the 8.

 

[Ajay]

The refresh is the 4 series and 6 series not the 8.

But those were only 1P

 

[ShadowVVL]

I think they should give thuban a shot on 28nm tech.

I dont know if money is holding them back from exploring or if some issue with thuban that stands in the way.

 

[Homeles]

I'd rather see Thuban on 32nm tech

I really, really like the Bulldozer concept. It's a shame that it wasn't ready in time. It arrived two years too soon, I guess.

 

[Vesku]

I see two main things holding back a Phenom II x6/x8 on current process nodes.

1. Cost of shrinking and baking in newer features: Advanced Vector Extensions, FMA instructions, FMA4 instructions, F16C instructions, XOP instructions

2. Potential embarrassment at trumping tech they spent so much time and money on.

Also, there might not have been much retail clock speed improvements over 40nm Thuban. I don't recall unlocked gpu disabled Llano getting past 4GHz consistently.

That said, the CMT aspect of Bulldozer actually turned out pretty well. It's the core design that had major missteps i.e. shooting for clockspeeds pretending your foundry doesn't have a history of taking quite a while to shake out the bugs in the latest process node.

 

[Homeles]

2. Potential embarrassment at trumping tech they spent so much time and money on.

I don't think so. Perhaps if we were still on Zambezi, but it'd take far too much R&D spending to take the Phenom architecture on a higher level than Bulldozer.

At this point, such an idea is folly, really. A 32nm shrink of Phenom would may have been a better product than the 8150, but we'll never know.

 

[Vesku]

I was speaking on the what if of a 32nm Thuban x6/x8 alongside of original 6100/8100. Not as an option to initiate a project today.

 

[pyjujiop]

I was speaking on the what if of a 32nm Thuban x6/x8 alongside of original 6100/8100. Not as an option to initiate a project today.

All microarchitectures reach a point where they can't scale higher. If AMD thought a die-shrink for Thuban would have reached significantly higher clock speeds without consuming enormous power, they would have made one. It probably would have been what Ivy Bridge is to Sandy Bridge, and not been much faster or clock much higher. It still made sense for Intel since the die-shrink makes it a better mobile platform. Thuban was never going in laptops.

 

[Homeles]

All microarchitectures reach a point where they can't scale higher. If AMD thought a die-shrink for Thuban would have reached significantly higher clock speeds without consuming enormous power, they would have made one.

That's not how I see it. I think AMD truly believed that their CMT design was going to provide such substantial advantages that they'd forgo their tried and true K10. I think they were right -- it's just taking longer to get there than they had envisioned.

And I don't see any real reason why K10 couldn't have gone faster, either. A switch to a HKMG process should have definitely sped things up.

 

[Ancalagon44]

That's not how I see it. I think AMD truly believed that their CMT design was going to provide such substantial advantages that they'd forgo their tried and true K10. I think they were right -- it's just taking longer to get there than they had envisioned.

And I don't see any real reason why K10 couldn't have gone faster, either. A switch to a HKMG process should have definitely sped things up.

I dont know if AMD feels quite the same - they are moving from shared instruction decoders to independent instruction decoders in SteamRoller. The only things that are still shared, as far as I know, are floating point and instruction fetch.

With regards to whether Thuban could have clocked higher - look at Core 2 Duo to Ivy Bridge. As far as I know, the pipeline is still the same length - 14. Also, remember that Thuban was hitting clockspeeds in the 3.6 Ghz range without overclocking. So, its not that they needed it to go higher, they just needed to improve its single threaded performance and reduce its power consumption. They could have added a micro ops cache like they are doing with SR, maybe decode 4 instructions per cycle rather than 3.

 

[Idontcare]

That's not how I see it. I think AMD truly believed that their CMT design was going to provide such substantial advantages that they'd forgo their tried and true K10. I think they were right -- it's just taking longer to get there than they had envisioned.

And I don't see any real reason why K10 couldn't have gone faster, either. A switch to a HKMG process should have definitely sped things up.

You are talking about CMT as being intrinsic to providing a performance advantage over that of stars core (thuban) when that is the opposite of how it works.

CMT provides only one advantage over CMP - lower die size than the comparably spec'ed CMP design, at the expense of lower performance.

You state "AMD truly believed that their CMT design was going to provide such substantial advantages", I don't believe this.

At best AMD believed their CMT design was going to offer a single substantial advantage - lower production cost because the die size would be smaller.

An 8-core 32nm llano beefed up with all the ISA extensions as bulldozer had, combined with larger circuits needed to hit 4GHz clockspeeds at stock would have required a much larger die than bulldozer's die (but the performance would have been all the higher as well).

This is the reason people have intentionally avoided CMT designs. If you can afford to make it a CMP design then you do so. CMT is a design choice you make when you are forced to make a compromise between performance and production cost, it isn't a choice you make to gain some performance advantages (as we see in comparing just about everything between bulldozer and sandy bridge).

 

[SocketF]

Guys that Thuban@32nm topic has been discussed extensively. It wont have been better because of 32nm's lack of ULK. Thuban was a special edition, so far the only CPU produced with ULK material. That gives you an power-consumption advantage like a full node shrink.

Anybody thought about why the Thubans had nearly the same clock speed as the quad cores but stick to the same 125W TDP? That is why.

Rather than seeing a Thuban at 32nm, I would have like to see an Bulldozer on 32nm ULK. Then it could have shipped with 4.0 Ghz, now we could be at maybe 4.4 Ghz. (Guessing that the jump from 3.6 -> 4.0Ghz of the 8150 / 8350 were not process related).

Either that or AMD could have a much higher L3-clock. The slow 2 GHz uncore clock is holding back the 8 cores in some (multithreaded) tasks severely

 

[guskline]

Expectations? Rumours? 8390? Prices? Performance? What have you heard?

Not interested in an Intel vs. AMD debate. Save that for a different thread please.

You can see from my sig that I actually own a FX8350 like IdontCare. He's done extensive testing on it. My feel is that there is very little room to go much higher on it. I have a stable OC at 4.6Ghz but that's with a H100 cooler. I've seen and read all these OC claims but AMD was probably already pushing the TDP limit with the stock 8350. Perhaps a 8370 refresh but that's it.

Moreover, take CEO Reed's words to heart. AMD is NOT going to emphasize the high end desktop chips. Where does that leave Steamroller? Anybody's guess. I'm sure that silicon is probably out there being tested but AMD's emphasis and financial lifeline seems fixed on APUs.

 

[cbrunny]

Moreover, take CEO Reed's words to heart. AMD is NOT going to emphasize the high end desktop chips. Where does that leave Steamroller? Anybody's guess. I'm sure that silicon is probably out there being tested but AMD's emphasis and financial lifeline seems fixed on APUs.

And APU = mainstream/value. puke.

 

[grimpr]

Moreover, take CEO Reed's words to heart. AMD is NOT going to emphasize the high end desktop chips. Where does that leave Steamroller? Anybody's guess. I'm sure that silicon is probably out there being tested but AMD's emphasis and financial lifeline seems fixed on APUs.

Its their future platform and chips, all depends on HSA though, but with the 2 major consoles already HSA enabled things will progress alot quicker.

 

[Homeles]

You are talking about CMT as being intrinsic to providing a performance advantage over that of stars core (thuban) when that is the opposite of how it works.

No, that's not what I was saying at all. Note how I did not use the word "performance" once.

I dont know if AMD feels quite the same - they are moving from shared instruction decoders to independent instruction decoders in SteamRoller. The only things that are still shared, as far as I know, are floating point and instruction fetch.

Shared L1 instruction cache, L2, microcode ROM, branch prediction unit, fetch, FPU. It's still a good 1/3 of the core, not counting the L2.

 

[inf64]

SR core will just introduce dedicated decoding stages in the module. Other parts of the design will be expanded/improved with emphasis on average load latency and improved dispatching capability (schedulers, registry resources etc.). The rest of the shared resources still remain. If supposed throughput improvement of 30% turns out to be correct, than sharing of FP unit will become the best design point of the whole uarchitecture since it will provide the performance of 2 separate FP units(traditional separate add and mul pipes) at the "cost" of just one(with multipurpose pipes).

There is a lot in stake when it comes to SR core,AMD must execute perfectly and deliver on what they promised. If it all ends up like they say(which is doubtful given previous experience) they can get away in 2014 in all segments with derivatives of SR and Jaguar follow up core. If not , they will have to cut a lot of their prices which can be catastrophic in the end.

 

[Vic Vega]

I would be interested in a refresh.

I have been extremely happy with my X4 965 over the last three years but if I could drop in a newer eight-core FX that would be nice as I do quite a bit of multi-threaded work on my system. If AMD does not do a refresh at some point I will drop in an FX8350.

 

[cbrunny]

Is the only Vishera refresh coming this year the one that is discussed here: http://forums.anandtech.com/showthread.php?t=2313518 (FX Centurion)

I've googled around a bit but haven't found any new info. Just wondering what others may have heard.

 

[Lepton87]

Is the only Vishera refresh coming this year the one that is discussed here: http://forums.anandtech.com/showthread.php?t=2313518 (FX Centurion)

I've googled around a bit but haven't found any new info. Just wondering what others may have heard.

Centurion seems like a pipe dream. If they really make one it will be like TWKR Phenom II,
only 100 units ever released.

 

[nemesismk2]

To me, sticking with AM3+ doesn't make any sense. They really, really need to move off that platform. Put it on FM2 or FM3.

I've only just got a AM3+ motherboard so don't want FM2 or FM3 just yet

 

[Smoblikat]

FX centurian..........the 5ghz 8 core.

 

[guskline]

FX centurian..........the 5ghz 8 core.

Oh Lordy!

 

[pantsaregood]

32nm Thuban? That's ridiculous.

Now, 6 or 8 core CPUs based on Llano with L3 cache added would be nice. Llano was tweaked to give ~5% better IPC over earlier iterations of K10.

Had AMD continued to add cores to K10 (as well as scaling clocks), it would have remained at least as competitive as Bulldozer has been. That isn't very extraordinary until you realize that K10 is overwhelmingly the same design as K7, which was released in 1999.

I know Sandy Bridge's roots can be traced back to P6, but it is much more disconnected from that than K10 is from K7.

 

[VirtualLarry]

http://www.newegg.com/Product/Produc...82E16819113327