I understand what you mean. The endurance is a bit confusing and what I meant to say is that manufacture may decide to release a product to a customer when they meet an endurance target, or jump the gun if they have controllers that can handle it.
Each new process takes a while to mature, and what your link provide is the typical mature product endurance: 100k for SLC, 10k for MLC, 1k for 3LC. My assumption is that these were based on 40-60nm processes that are already mature, and can buy from any manufacturers and used any ASICs from Phison, 3S, TDK, etc with little to no problem.
The industry is migrating to 32-34nm at the moment and some manufacture (i.e. Micron, SanDisk/Toshiba) are already shipping in this generation. The life isn't that great yet, but good enough if you have a controller that can "wear level" and "ECC" your way out of the low life. This is how integrated memory / card manufacturers like SanDisk, Toshiba, Samsung, Lexar/Micron made their money, by being the first out of the gate with products that can handle lower quality memory with internal knowledge of the weakness of the NAND. When the processes mature, 3rd party card manufacture start buying mature memory with cheaper ASIC from companies like Phison that cost less than what integrated memory manufacturers cost to make.
So, what you say is correct, that most memory manufactures don't release a memory until they get close to these target, but many of them can still use the weaker ones in house if they know what they are doing, and take advantage of the memory that would have been scrapped.