Is ECC RAM Better than PC133 SDRAM (Cas2)

[dowxp]

Performance-wise, which is better? nevermind the error checking business and price. which one wins?

 

[SUOrangeman]

Speed-wise, no ... as there is the error-checking circuitry you mentioned.

Security-wise, yes.

Performance is not only measured in speed, I'm afraid.

-SUO

 

[KarsinTheHutt]

ECC supposedly makes the computer less prone to crashes, but I've read that it incurs a slight (almost negligable) performance hit. Unless the stuff you run is really mission critical, I don't think you need ECC RAM.

 

[Wuming]

i never really hear about people emphasising on ECC when buying ram. think for us we do not need that extra feature? anyway how much more does ECC makes the ram cost?

 

[mosdef]

With the price of SDRAM having sunk very low, I expect ECC to be relatively expensive. In any case, avoid it as, with all else being equal, it is more expensive and in the worst-case IS slower than standard SDRAM.

-mosdef

 

[jamarno]

ECC cuts the memory speed from 0-3%, not a big penalty for the improved reliability, and I haven't bought non-ECC modules in 3 years.

 

[dowxp]

thanks guys for clearing it up. i suppose now, its not worth the extra money to buy it. and so.. its slower than pc133 too.

 

[ruckb]

Hi,

some time ago, we had an interesting discussion about performance of ECC, and I tought also, that I have read somewhere, that ECC would slow down the system a bit. But we couldn't find a reason.
ECC (on L2) thread

But anyway, what you are talking about are two totally different things. And if you are overclocking, then first you will get some single cell fails, that may be corrected by ECC. Therefore you may get some performance gain for a OC system

So if anyone knows why ECC should be slower, any input is wellcome !!!!

ruckb

 

[larrymoencurly]

How much time does it take to calculate the ECC and write it to the memory? Is the writing done while the memory isn't used for anything else, or is there overhead (I've heard it's either zero or far below 5%)?

 

[miniMUNCH]

I think mushkin says their ECC memmory takes a 2% hit in performance WRT non-ECC.

Yep, here the link.

 

[TravisBickle]

I don't think modus is right in going on about money. all dimms look cheap right now. no sensible person would build a server without ecc.
anyway, we are told ddr is 2x data rate of sdram, yet the benchmarks don't show a 2x improvement- in fact they don't even show a 20% improvement. so why are we to be worried about 2 to 5% loss of memory speed?

 

[ruckb]

Good input larrymoencurly (and good link miniMUNCH),

I think we didn't really talked about the writes in our last discussion. For the reads t should be calculated in parallel, and a performance impact should only occur, if ther is a failure.
But for the read the correct ECC Info hast to be calculated in the chipset. This can cause some delay in the chipset, for writes.
But then the complete databus is written ==> 72 bits at the same time.
Although I would expect some kind of pipelining of the writes to the memory (and for a longer pipeline there could be enough time to calculate the ECC information in parallel) this can cause a small performance impact that the writes are delayed (maybe by one cycle?) !

thanks

 

[jamarno]

Cache speed matters so much that main memory speed is almost a nonfactor, and anyone with a VIA MVP3 chip set motherboard can prove it - slow the SDRAM from 100MHz down to 66 MHz, and the computer still retains 97% of its speed.

 

[MushkinTechs]

Using ECC supposedly decreases your PC's performance by about 2%. In my opinion, current DRAM technology is very stable and memory errors are very rare. I've heard statistics like one error every 8 years for current DRAM technology.

I think ECC SDRAM should only be used in mission critical server. For regular home, office, or gaming applications, I think everyone is better off with non-ECC because it is cheaper, there is no performance hit, and it might be more overclockable despite what ruckb said.



<< if you are overclocking, then first you will get some single cell fails, that may be corrected by ECC >>



While that is possible, it's also possible that the increased capacitance load on the memory subsystem caused by the extra chip(s) on the module will also negatively affect overclockability. Also, a module is only as overclockable as its slowest chip. So adding one or two chips per module may end up negatively affecting overclockability. I believe non-ecc is the lesser of two evils when it comes to overclocking.

However you can buy ECC memory and disable it in the BIOS so you don't get the performance hit and have the option of re-enabling it at a later date if the need ever arises or if you find it helps overclockability. Oh yeah, if you have ECC memory now, you can actually benchmark your system to see what kind of performance penalty Bangsailio might incur. Just saying that there is a 2% performance penalty is very vague. ECC is obviously going to affect memory intensive applications more than 2% while not showing any performance decrease in applications that fit entirely into L1 or L2 cache.

 

[ruckb]

Hi MushkinTechs,

interesting thoughts, but I can only partly aggree with you.
addidional capacity on bus:
The DQs are just on its own, so no added Cap.
The clocks are a little bit more complicated. The unbuffered DIMMs are getting 2 clocks for SDR (3 for DDR). But if you have a non ECC DIMM, both CLKs sees 4 chips and a 3.3pF additional load. for a ECC DIMM CLK0 sees 5 devices and no additional load. And this means, the load condiditons for ECC and non ECC DIMMs for CLK signals are the same.
The only pins that sees the addtional load are the Commands and Addresses. But in every system I have seen so far ther are enough SetupHold time margins, that this was never a problem.
The drivers see a 1/8 more load on this pins, but the overall load is much bigger, as you have to add the board capacity too.
For DDR it will be a similar thing. The addresses and commands are the less critical, because they are as slow as SDR.

The problem with the slowest chip is in although not completly correct. You are right, that the system is only as fast as the slowest chip, but the ECC algorithm is able to recognice, whether the fail is coming from the ECC chip or from the real data. Therefore the Chipset is able recognice, that a failure was induced by the ECC chip.

I can aggree with you, if you are saying that DRAM technologie is quiete stable,but only if two things are fullfilled . You can make this statement, as Mushkin is fullfilling this things!
- Only DRAMs with a known Brand name are taken as good quality. As soon as you have chips, where you don't know exactly where it came from it can be crap, that the manufacterer just don't want to sell under the own label.
- You are not overclocking your system.

As soon one of this two things is not given DRAMs are one of the most critical things in a PC system, and causing the most trouble.

Don't get me wrong. I don't want to tell you &quot;buy ECC&quot;. I just want to take a closer look at the differences from technical point of view!

bye

ruckb

 

[MushkinTechs]

Very interesting ruckb, thanks for the insight. I guess I have to bow to your superior electronics knowledge. Any suggestions or links to articles that would help bring me up to your knowledge level would be appreciated.

Also, are you looking for a job?

 

[ruckb]

Hi Mushkintechs,

thanks for the flowers, but I have already a good job ;-)

for the links I'm using normally the Internet pages of the manufacterers. e.g. for the information about the capacity on the DIMM i used a datasheet from Infineon

DIMM datasheet

On page 5 is the blockdiagramm including the caps.

But normally the official Intel PC100 DIMM spec would be better, but I had the Infineon Spec on my local hdd. And I know, that Infineon is manufactering according to this spec.

For the ECC information, we had about 6 month ago a disucssion in the forum. I was searching for this discussion, but i couldn't find it again. While this discussion I was looking for an ECC algorithm, and posted the link to a good description. I don't know the link any more, but I think I could find the document if you are interested.

bye

ruckb

 

[MushkinTechs]

Hi ruckb, had to give it a shot. If you ever want a job that you can do from home, do a search for &quot;MushkinTechs&quot; and tell me.

Thanks for the tip on checking out the datasheets. I've done this before and found it very humbling. Recently I got a good book called &quot;Code&quot; (published by Microsoft) and while it has helped with the feeling of being lost, I'm still quite a few electronics classes away from being able to understand everything I see in a datasheet.

I did a search for all your posts under the username ruckb, but the oldest one I could find was from June 10th, and I was unable to find one dealing with ECC memory. No worries, I'm sure I'll be able to find it through a search engine or by searching the newsgroups as I'm sure I'm not the only looking to learn more about it.

 

[ruckb]

Hi,

in the meantime I found at least one reason, why ECC Memory is slower then non ECC.
There are done partial writes to the memory to. Therefore the datamask pin is used to write not the complete 64 bits to the DIMM. But if you are using ECC then The ECC value has to be calculated from all 64 bits. therefore a RMW (Read modify Write) hast to be done, what takes more time then a partial Write with datamask.
additional chipset dataseets say, that some read have an additional latency. But this is not the DIMM Latency, but it has to be in the chipset.

bye

ruckb