Is Intels fabrication process advantage shrinking?

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Phynaz

Lifer
Mar 13, 2006
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http://www.guru3d.com/news_story/in...have_pci_express_4_ddr4_and_sata_express.html

I just read some latest developments and intel would be releasing the 14nm for consumers by 2014 only. As far as 10nm is concerned then looking at the way intel had managed these things in the past. I really doubt that they would release 10nm before 2016 for consumers. It would require change in material for that. And they would really want to squeeze out the last bit of profit before jumping to that one. Untill or unless AMD would do something about that.

Please read the news from IDF, okay? You posted an old Xeon roadmap, not a current desktop roadmap. Also, Skylake is the second generation 14nm product.

At IDF Intel stated 10nm in 2015 and 7nm in 2017.
 

Blandge

Member
Jul 10, 2012
172
0
0
Please read the news from IDF, okay? You posted an old Xeon roadmap, not a current desktop roadmap. Also, Skylake is the second generation 14nm product.

At IDF Intel stated 10nm in 2015 and 7nm in 2017.

Please understand that Broadwell is not shipping for revenue this year. Krzanich was referring to ESs shipping to OEMs to develop their products.
 

Phynaz

Lifer
Mar 13, 2006
10,140
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Please understand that Broadwell is not shipping for revenue this year. Krzanich was referring to ESs shipping to OEMs to develop their products.

Wanna bet on that?
OEM's already have samples. How do you think they are showing products? IDF is more than a couple of speeches, there's already something like 50 functioning Broadwell products on display.
 
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Blandge

Member
Jul 10, 2012
172
0
0
already 50 functioning Broadwell products are on display.

BK shows one FFRD and now that's 50 functioning products? Show me a single article that states that the device was anything more than an FFRD.

I'm not trying to insult you or argue with you or anything. I'm just telling you are woefully incorrect about Intel's release schedule. Haswell-Y isn't even out.

You have either been misinformed or you have misunderstood that information that's been given to you because what you are saying now is incorrect, and you are just going to be let down if you build this up anymore than you already have.
 
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USER8000

Golden Member
Jun 23, 2012
1,542
780
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Wanna bet on that?
OEM's already have samples. How do you think they are showing products? IDF is more than a couple of speeches, already 50 functioning Broadwell products are on display.

http://techreport.com/news/25342/intel-demos-working-14-nm-broadwell-chip-to-ship-soon

TR said:
IDF — Today, during his opening keynote at the Intel Developer Forum, Intel CEO Brian Krzanich demonstrated a working laptop based on a 14-nm chip. The processor, code-named Broadwell, is a die-shrunk version of the 22-nm Haswell parts underpinning today's Core i3/i5/i7 CPUs.
Krzanich didn't offer too many details, but he revealed that Intel's 14-nm process is now viable. The company expects 14-nm Broadwell processors to begin shipping by the end of this year, with products reaching the hands of end users in 2014.


http://www.anandtech.com/show/7309/intel-14nm-progress-update-broadwell-airmont-on-schedule

http://venturebeat.com/2013/09/11/i...ooks-and-plans-to-make-3d-gestures-pervasive/



Kirk Skaugen said:
During a keynote, Kirk Skaugen, the Intel senior vice president in charge of PC clients, showed off a new $200 Senz3D camera from Creative. It supports apps that use Intel’s perceptual computing software development kit.
Intel’s 14-nanometer Broadwell chip, coming for Ultrabooks in late 2014, will support integration of a 3D camera directly into the bezel of a laptop, Skaugen said. That’s a lot of progress since 2012, when the company announced the perceptual computing initiative to move beyond the mouse and keyboard.


http://www.anandtech.com/show/7318/intel-demos-14nm-broadwell-up-to-30-lower-power-than-haswell


The first Broadwell silicon is supposed to ship to customers by the end of this year, and in systems next year.
As indicated previously,the first Haswell silicon was available in Q4 2012,and CPUs launched over six months later. Ivy Bridge silicon was available months before retail availability. Trinity and Kaveri silicon was available months before retail availability(shown in laptops),even the BD samples which indicated its probably performance.

It is pretty normal for prototype chips and low volume ES chips for validation to be around months before any sort of retail availability. People underestimate how long it takes to validate and test things especially the infrastructure surrounding such CPUs. Prototype motherboards,validation of motherboard designs,final CPU clockspeeds,new instruction sets,etc. This is not new.
 
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tipoo

Senior member
Oct 4, 2012
245
7
81
Gah, out-geeked by Anandtechers again. Thanks for the information everyone. I didn't realize TSMC wouldn't' have an Intel 22nm equivalent process until 16nm.
 
Mar 10, 2006
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Do you have any reliable source of such information or it's just pure speculation?

I saw what appeared to be an internal AMD document. Can't guarantee its authenticity, but the person who showed it to me is pretty reputable.
 

Phynaz

Lifer
Mar 13, 2006
10,140
819
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It is pretty normal for prototype chips and low volume ES chips for validation to be around months before any sort of retail availability. People underestimate how long it takes to validate and test things especially the infrastructure surrounding such CPUs. Prototype motherboards,validation of motherboard designs,final CPU clockspeeds,new instruction sets,etc. This is not new.

I don't need an education about validation, thanks. I can promise you Intel customers have Broadwell in use today.

I also know what the difference between a CPU and system is.

I also know what I hear when I view the keynote and the CEO of Intel says Broadwell is shipping this year.
 
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Exophase

Diamond Member
Apr 19, 2012
4,439
9
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You're absolutely right. The likely explanation is that Apple's chip is mostly GPU, which can be made much more densely than CPU.

But for what it's worth, I don't agree with that explanation. This is what I posted about it on beyond3d:

Some people are saying that A7 is a lot denser because it's proportionately more GPU and GPU is denser, but I doubt this because higher end Series 6 is supposed to be more area efficient than Series5XT - which is what you'd expect because they don't eat the area inefficiency cost of stacking together separate cores. Since they "only" get 2x the GPU performance and since I suspect part of that would be due to a clock boost I don't expect there'd be substantially more than 2x the GPU transistors used, even accounting for the extra space needed for new features.
I simply believe TSMC's denser than Samsung at the same node designation. There's no other way to explain why Cortex-A9 is of comparable size on TSMC's 45nm (OMAP4430) vs Samsung's 32nm (A5r2, A5X, Exynos 44xx.) It's not like TI achieved better density by sacrificing electrical performance, OMAP44xx played at the same clock speeds and power consumption as their competitors. Freescale's i.MX6 was also very dense - quad core A9 and pretty decent GPU at only 52mm^2 (http://cache.freescale.com/files/32bit/doc/app_note/AN4579.pdf search for die size) on TSMC 40nm process (http://www.newelectronics.co.uk/ele...iconductor-expands-apps-processor-range/39377). Compare with Apple A5 on Samsung's 45nm, dual Cortex-A9s and GPU that's better but not earth-shatteringly so, which weighs in at a whopping 122mm^2. Look how much people were slagging Apple's die sizes, comparing them to much more sophisticated Intel chips. And monsters like A5X were GPU-heavy compared with everything else, so if that argument didn't help then.. Tegra 2-4 also look very favorably when compared in die size vs their nearest Apple equivalents.

I know people are always saying Samsung is supposed to have better density because of gate first vs gate last but I'm just not seeing it. Is my line of thought really so off here?

And really, Apple never boasted about transistor counts or density before. They didn't talk about it when they made outright shrinks in particular (the pure shrinks like A5r2 weren't in any way even acknowledged at all, just silently slipped into existing products). All of a sudden they're talking about making a chip that packs double the transistors into the same area to an audience that mostly knows nothing about transistors, while meanwhile giving the same old generic "2x better" crap for CPU and GPU. Sounds to me like they're happy with TSMC giving them better density than Samsung and are boasting about it as a way of publicly flipping Samsung off.

Now, I know the GlobalFoundries supporters aren't going to like this, so as a disclaimer I'll just say that, while to the best of my knowledge Samsung and GF's process are supposed to be "similar" I don't directly intend for this stuff to apply to GF w/o more information. I pushed that before and didn't really have good information to back it up so I take it back
 
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Mar 10, 2006
11,715
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But for what it's worth, I don't agree with that explanation. This is what I posted about it on beyond3d:

I simply believe TSMC's denser than Samsung at the same node designation. There's no other way to explain why Cortex-A9 is of comparable size on TSMC's 45nm (OMAP4430) vs Samsung's 32nm (A5r2, A5X, Exynos 44xx.) It's not like TI achieved better density by sacrificing electrical performance, OMAP44xx played at the same clock speeds and power consumption as their competitors. Freescale's i.MX6 was also very dense - quad core A9 and pretty decent GPU at only 52mm^2 (http://cache.freescale.com/files/32bit/doc/app_note/AN4579.pdf search for die size) on TSMC 40nm process (http://www.newelectronics.co.uk/ele...iconductor-expands-apps-processor-range/39377). Compare with Apple A5 on Samsung's 45nm, dual Cortex-A9s and GPU that's better but not earth-shatteringly so, which weighs in at a whopping 122mm^2. Look how much people were slagging Apple's die sizes, comparing them to much more sophisticated Intel chips. And monsters like A5X were GPU-heavy compared with everything else, so if that argument didn't help then.. Tegra 2-4 also look very favorably when compared in die size vs their nearest Apple equivalents.

I know people are always saying Samsung is supposed to have better density because of gate first vs gate last but I'm just not seeing it. Is my line of thought really so off here?

And really, Apple never boasted about transistor counts or density before. They didn't talk about it when they made outright shrinks in particular (the pure shrinks like A5r2 weren't in any way even acknowledged at all, just silently slipped into existing products). All of a sudden they're talking about making a chip that packs double the transistors into the same area to an audience that mostly knows nothing about transistors, while meanwhile giving the same old generic "2x better" crap for CPU and GPU. Sounds to me like they're happy with TSMC giving them better density than Samsung and are boasting about it as a way of publicly flipping Samsung off.

Now, I know the GlobalFoundries supporters aren't going to like this, so as a disclaimer I'll just say that, while to the best of my knowledge Samsung and GF's process are supposed to be "similar" I don't directly intend for this stuff to apply to GF w/o more information. I pushed that before and didn't really have good information to back it up so I take it back

I appreciate your post, as usual, Exo.
 

videogames101

Diamond Member
Aug 24, 2005
6,777
19
81
There isn't any truth to it is the bottom line. Someone grabbed onto the fact Intel didn't scale their M1 pitch at 22nm as aggressively as they did for 32nm and decided to try to make a mountain out of a molehill before everyone else published their 22nm pitch design rules...once the other's published theirs the picture got quite a bit different because Intel actually has tighter pitch than the 22nm competition (IBM).

But the real reason why there is nothing to the original argument is the simple fact that nodes have no definition. There is no rule or law or industry standard for defining what constitutes a 22nm node, a 20nm node, etc. It is a label that is used solely at the discretion of whoever wants to use it.

You could, right now, declare to the world you have invented a 7nm node if you wanted. What are the design rules? Could be a breadbox layout for all it matters, there is no definition of what a 7nm is such that your claims would become technically invalid.

It is just silliness really, marketing silliness.

did it not indicate gate length at one time?
 

Idontcare

Elite Member
Oct 10, 1999
21,118
59
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did it not indicate gate length at one time?

There was a time when a handful of companies did label their nodes by the drawn gate-length (but by no means even a simple majority, and at no point was it an accepted industry-wide practice to designate nodes by the drawn gate-length)...the most famous of which was Intel, and they broke with that convention circa 0.35um (~1998).

There was another contingent which likewise adopted a "1/2 the M1 pitch" as their node label designation, again a purely sloppy rule that even with the same companies it was not stringently adhered to.

And there is good reason why this is the case. Specifically, a process node is generally defined at the outset by a simplistic set of targets, some electrical and some physical.

An Idrive target of X uA/um @ 1V & 105C, an Ioff target of Y nA/um, etc etc.

The design rules themselves, gate lengths and pitches, are actually variables in the effort to hit the intended electrical parameters with the intended lifetime reliability, at the intended yield levels and on the intended timeline.

I've seen metal pitches vary by nearly 20% over the course of the development of a process node before it hit production, and target minimum gate lengths vary just as much during the process development phase.

So it never really made sense to draw your line in the sand regarding your next node on the basis of some arbitrary physical dimensionality when the real goal (the actual lines in the sand) are all about electrical parametrics and high-level dimensionality stuff (sram density, yield enablement, reliability trade-offs, and ultimately the target clockspeeds and power consumption).

Nowadays the only convention that tends to be supported is that, in general, if a node label has been iterated (say 32nm -> 22nm, or 28nm -> 20nm) then we can expect the xtor density for comparable circuits to roughly double.

But it is not guaranteed, and it is not a hard and fast rule (nor is it even the target of the process development engineers). As you will see come TSMC's 16nm which will barely change the xtor density over that of 20nm but the electrical performance will significantly improve.
 

Abwx

Lifer
Apr 2, 2011
11,172
3,868
136
At IDF Intel stated 10nm in 2015 and 7nm in 2017.

Theses expectations are for marketing purposes , there will
be no 10nm in 2015 ; let alone 7nm in 2017.

Think about it , if 14nm is released in 2014 , at best ,
this would imply one year use before replacement
by 10nm , this doesnt make sense at all.
 

Abwx

Lifer
Apr 2, 2011
11,172
3,868
136
Sounds to me like they're happy with TSMC giving them better density than Samsung and are boasting about it as a way of publicly flipping Samsung off.

Now, I know the GlobalFoundries supporters aren't going to like this, so as a disclaimer I'll just say that, while to the best of my knowledge Samsung and GF's process are supposed to be "similar" I don't directly intend for this stuff to apply to GF w/o more information.

Actualy density is all TSMC can offer , their electrical
parameters being vastly inferior to either intels or glofos
most refined processes.

Currently prices being the main factor they have plenty
of cost restricted customers but if ever the competition
increase , and it is with intel targeting the lowly priced chips ,
any foundry that has superior process will highjack their
customer base , as it happened with qualcomm switching
to glofo to benefit from a more advanced process.
 

AtenRa

Lifer
Feb 2, 2009
14,003
3,361
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Shipping for revenue in the end of 2013 has nothing to do with products in retail in Q2-Q3 2014. Even when 14nm products will launch in retail in 2014, the majority of Intels production and products will be on 22nm.
Haswell has been released 3 months ago and NewEgg only has 6-10 products(mobile) available. IvyBridge Laptops are more than 90% of Intels retail products currently and they will continue to have the larger volume until the end of the year.
 

Kippa

Senior member
Dec 12, 2011
392
1
81
Will mainstream broadwell going to be a quad only or will the release a six core version seeing as Haswell E is going to be an 8 core later on in 2014?
 

CHADBOGA

Platinum Member
Mar 31, 2009
2,135
832
136
Theses expectations are for marketing purposes , there will
be no 10nm in 2015 ; let alone 7nm in 2017.

Think about it , if 14nm is released in 2014 , at best ,
this would imply one year use before replacement
by 10nm , this doesnt make sense at all.

14nm is shipped to OEM's in 2013, available to regular people in 2014.
10nm to be shipped to OEM's in 2015, available to regular people in 2016.
7nm to be shipped to OEM's in 2017, available to regular people in 2018.
 

Abwx

Lifer
Apr 2, 2011
11,172
3,868
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14nm is shipped to OEM's in 2013, available to regular people in 2014.
10nm to be shipped to OEM's in 2015, available to regular people in 2016.
7nm to be shipped to OEM's in 2017, available to regular people in 2018.

You can forget the two years dev cycle for both 10nm
and 7nm , theses are no more trivial nodes , current tools
are to be replaced completely as they wont be extendable
past 14nm.
 

zlatan

Senior member
Mar 15, 2011
580
291
136
Just thinking about the Apple event yesterday. They said 1 billion transistors on the same die size (100mm2), which means they must have shrunk it to 20nm.
Nothing unnatural here. The Kabini/Temash SoCs die size is 110 mm2. And they are made at TSMCs 28 nm process node, with more then 1 billion transistors inside.
A gate-first Glofo/Samsung process even denser.
 

CHADBOGA

Platinum Member
Mar 31, 2009
2,135
832
136
You can forget the two years dev cycle for both 10nm
and 7nm , theses are no more trivial nodes , current tools
are to be replaced completely as they wont be extendable
past 14nm.

For now, I see them as far more credible than you.
 

CakeMonster

Golden Member
Nov 22, 2012
1,428
535
136
Who knows? Tick-tock is still alive and well despite all the complaining about actual performance. 10 and 7 might also prove to be available as planned.

Right now, the question that I'm most interested in is whether Broadwell will be available in non-BGA so that I can buy one for my s1150 motherboard.
 

NTMBK

Lifer
Nov 14, 2011
10,269
5,134
136
Who knows? Tick-tock is still alive and well despite all the complaining about actual performance. 10 and 7 might also prove to be available as planned.

Right now, the question that I'm most interested in is whether Broadwell will be available in non-BGA so that I can buy one for my s1150 motherboard.

Potentially as a Xeon E3 chip, though there are rumours that Haswell chipsets won't support them.
 
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