Ivybridge should match LLano in graphics

[Nemesis 1]

You do realise that 37% increase was at very low voltages? Forget about seeing anything near 37% increases unless you are buying a smartphone.

Hay settle down your stepping over the line AT has drawn.

Your looking at IB chip as a whole . I am looking at it as having independent power planes . So did intel say were that power plane is thats allows the low voltage 37% increase in performance . Your making out way to much that this applies to a Atom only . a 10 watt chip. IB 2 core can come in at 20watts according to recent info. so that IGP isn't using more V than an atom 10 watt chip. IGP has its own power plane what part flew over your head.

 

[jimbo75]

Hay settle down your stepping over the line AT has drawn.

What line? You seem to be mistaking "trolling" with "reading information I don't want to see".

I'm not trying to upset you or anyone, I'm simply pointing out the inconsistencies in Otellini's comments, and that the worlds first 22nm demo was 3 months later than anticipated.

You don't like the truth? That's not my fault, I'm not forcing you to read it.

Your looking at IB chip as a whole . I am looking at it as having independent power planes . So did intel say were that power plane is thats allows the low voltage 37% increase in performance . Your making out way to much that this applies to a Atom only . a 10 watt chip. IB 2 core can come in at 20watts according to recent info. so that IGP isn't using more V than an atom 10 watt chip. IGP has its own power plane what part flew over your head.

And what is the operating voltage of SB? Now look at the graph again on the front page.

 

[Nemesis 1]

I don't understand which part of it you aren't getting. Intel could say "IB wil be released tomorrow", would you believe that?

So why believe it will be ready for q1 next year?

This is it . Link to last time INTEL lied about a product release . Just 1 link. You can have the debate points as your leading me towards the ban hammer john.

 

[jimbo75]

This is it . Link to last time INTEL lied about a product release . Just 1 link. You can have the debate points as your leading me towards the ban hammer john.

You're kidding me right? How many Larrabee links would you like?

 

[Nemesis 1]

You never heard of Knights ferry I take it. Yes it was late as I and everyone expected . I however expected it to work . That didn't happen . True enough . But PAT is gone now for how he handled it. That made it right by me. PAT made intel look bad and got what he deserved. But you did supply that 1 link . So debate points to you .

Intel for the win with 3D transistors and IB / Atom /knights corner. I looked at all the graphs. I seen the V. that 37% performance is to kick in . You thinK IB IGP is going to go over that limit . I don't.

But I did say 1 link,Even tho I wasn't speaking of GPUs thats my slip . Debate to you . Your prize I am out of this topic . come jan. 2012 you best hope IB doesn't show up . Because I will crucify ya if it does.

 

[Phynaz]

You're kidding me right? How many Larrabee links would you like?

I'll take any one you have that states an Intel release date.

 

[Phynaz]

Who's talking about 2011? You won't see IB in January either. Or Feb or March. At best they will do a laughable paper launch just so they can say they are still "on track", but there will be no volume IB until 2nd half 2012.

Source?

 

[jimbo75]

I'll take any one you have that states an Intel release date.

Oh so there has to be a specific release date now or it's ok?

How about you pick any date from 2007 to 2010, every time intel said Larrabee was due was just a bare-faced lie. Otellini kept up the lies only a few months before it was finally killed off when he must have known it was a total failure.

 

[Phynaz]

Oh so there has to be a specific release date now or it's ok?

How about you pick any date from 2007 to 2010, every time intel said Larrabee was due was just a bare-faced lie. Otellini kept up the lies only a few months before it was finally killed off when he must have known it was a total failure.

Hey, you're the one saying they lied about the release of Larrabee.

Go ahead and back it up.

Regardless, it's been canceled. Like companies don't cancel projects all the time.

 

[Majic 7]

And how long have we been hearing about Bulldozer?

 

[Phynaz]

And how long have we been hearing about Bulldozer?

If memory serves, Bulldozer is now two years late.

Fusion was a couple of years late.

Both Falcon and Swift were no-shows.

 

[krumme]

And in 2006 Intel said 3d transistors would be there for 2009.

AMD and Intel are just people like the rest of us. Every single time we have to estimate time, we are optimistic and just add say ½ year. And every time the result is the same. Its late. Especially production and process technology is very difficult to predict - even for masters like Intel. Late in the devellopment process you encounter difficult problem, fx. some unforeseen trouble with the production tools, and you have to pospone the start date of the high volume manufacturing. You have to recognise innovation in production and process is whats count in this business today, not the fundamental r&d or for that sake, architectual design (witch is very much integrated to production tech anyway).

Delays is because of innovation and the positive spirit of the engis/techs, all the blame stuff is nonsense.

 

[ydnas7]

if we look not at the speed increase but at the power reduction requirements, then Ivybridge gets real interesting
http://ark.intel.com/Compare.aspx?ids=53580,52576,
by halving power requirements while maintaining performance the Ivybridge will be able to provide 6 core speed in a 12 core die
(or 2 core frequency/power dissipation in a 4 core package) think xeon 5698

 

[Lepton87]

if we look not at the speed increase but at the power reduction requirements, then Ivybridge gets real interesting
http://ark.intel.com/Compare.aspx?ids=53580,52576,
by halving power requirements while maintaining performance the Ivybridge will be able to provide 6 core speed in a 12 core die
(or 2 core frequency/power dissipation in a 4 core package) think xeon 5698

I have no idea what you mean. Care to elaborate?

 

[ydnas7]

I have no idea what you mean. Care to elaborate?

people are focusing on the vertical lines on the second graph, but if were to draw a horizontal line instead, they would see that these new transistors use about half the energy for the same performance as the prior 32nm process.

so a 12 core IB can run (all cores on) at the same frequency as a 6 core SB (all cores on)

a dualcore IB laptop chip will be able to have a TDP that matches today's dual core Atom.

 

[Vette73]

Hey, you're the one saying they lied about the release of Larrabee.

Go ahead and back it up.

Regardless, it's been canceled. Like companies don't cancel projects all the time.

Intel kept giving release dates and pushed them back and back till it was canceled. Here is a quick quote I found from an Intel VP.

"Intel VP of corporate technology Joseph Schultz mentioned that Intel is now looking at a release date of the first half of 2010, moved back from the company’s original late-2009 target."

Here is Intels CTO...

"Justin Rattner, Intel's CTO, also noted that Larrabee will be their "first tera-scale processor" and that it is aimed at a 2010 release, or possibly 2009 if things go especially smoothly."


But I know first hand companies give release dates based on managers and marketing, not what the grunt engineers are telling them. So until I see it running, it could die anytime.

 

[Abwx]

so a 12 core IB can run (all cores on) at the same frequency as a 6 core SB (all cores on)

a dualcore IB laptop chip will be able to have a TDP that matches today's dual core Atom.

You are misinterpreting theses graphs...

The left one just testify lower static losses, that is
when gate voltages are zero, and thus devices not conducting.

The second one show higher speed, but the losses
are mainly related to charging/discharging all the parasistics
capacitances that make about a total of a few Nano Farads,
and in this respect, a faster transistor will change nothing...

 

[Idontcare]

people are focusing on the vertical lines on the second graph, but if were to draw a horizontal line instead, they would see that these new transistors use about half the energy for the same performance as the prior 32nm process.

so a 12 core IB can run (all cores on) at the same frequency as a 6 core SB (all cores on)

a dualcore IB laptop chip will be able to have a TDP that matches today's dual core Atom.

Wow! You are right, I had completely overlooked this aspect.

Power consumption scales at the voltage cubed for modern planar CMOS (sub-90nm). Traditional scaling went as the voltage squared.

A reduction in operating voltage from 1V to 0.78V while keeping the same clockspeed would be expected to net out to nearly 40% reduction in power consumption under load conditions (if power scales to the square) and possibly up to a 52% reduction (if power scales to the cube).

Throw in the typical reduction in capacitance that comes with a node shrink and you are right, they very well could be seeing a 50%-65% reduction in power consumption on a normalized basis for the 22nm node over the 32nm.

 

[Abwx]

Wow! You are right, I had completely overlooked this aspect.



Power consumption scales at the voltage cubed for modern planar CMOS (sub-90nm). Traditional scaling went as the voltage squared.

A reduction in operating voltage from 1V to 0.78V while keeping the same clockspeed would be expected to net out to nearly 40% reduction in power consumption under load conditions (if power scales to the square) and possibly up to a 52% reduction (if power scales to the cube).

Throw in the typical reduction in capacitance that comes with a node shrink and you are right, they very well could be seeing a 50%-65% reduction in power consumption on a normalized basis for the 22nm node over the 32nm.

I doubt it..
TDP goes square law once you increase voltage but
frequency increasement without VDD increasement yield
a linear law.

 

[Phynaz]

I doubt it..
TDP goes square law once you increase voltage but
frequency increasement without VDD increasement yield
a linear law.

You're trying to tell a semiconductor manufacturing process engineer how chips consume power.

Alrighty then....

 

[busydude]

I doubt it.. TDP goes square law once you increase voltage but frequency increasement without VDD increasement yield a linear law.

Life would be so much easier is everything was that cut and dry.

 

[Abwx]

Wow! You are right, I had completely overlooked this aspect.

Throw in the typical reduction in capacitance that comes with a node shrink and you are right, they very well could be seeing a 50%-65% reduction in power consumption on a normalized basis for the 22nm node over the 32nm.

You have surely noticed that this graph compare a 32nm planar
with a 22nm tri-gate processes....

 

[OCGuy]

You're trying to tell a semiconductor manufacturing process engineer how chips consume power.

Alrighty then....

That is the guy that thinks Anand is part if the "spIntel" propaganda machine.....just so you know.

 

[Phynaz]

You have surely noticed that this graph compare a 32nm planar
with a 22nm tri-gate processes....

So....?

In what way does that invalidate what IDC has said?

 

[Phynaz]

That is the guy that thinks Anand is part if the "spIntel" propaganda machine.....just so you know.

I was sarcastically letting him know who IDC is.

I probably could have kinder about it.