@ SocketF
Here . This is the slide from March 2013 presentation by AMD on HPC computing.
Can you see the difference to my slide?
AMD got a new photoshop guy ;-)
Seriously, I would not calculate the performance according to a power point slide, that suddenly changed from linear to exponential without any reason.
Well there is one reason, the x-scale also changed from "Performance/Watt" to "Performance" only. So yes, you could assume a big performace jump, together with a big power-consumption jump. However, given the already "over the top" power consumption of the BD-chips, I would rule out that possibility, too.
IMO it is just the optical effect of Rory "Predator" Read joining AMD in between. The speeches and diagrams got colorful and more aggressive, but I doubt that the chips changed, too.
AMD won't be able to compete with Haswell-E unless they have full 256bit SIMD (and FMA) pipeline capability. This implies they will have 2x256bit fmac pipes per one shared FlexFP unit.
AMD won't be able to compete with Haswell-E unless they'll use a 20nm finfet process.
Does that mean that EX will use a 20nm finfet process? Unfortunately no
2x256 fmacs would be indeed nice, but then you'll also need a doubled L1 cache interface. It's 2x128b now, you'll need 2x256b then and the power consumption would rise even more. I don't see enough room for a doubled FPU, the module size will already increase a lot from all the "parallel" improvements.
Maybe at 20nm, but I doubt that EX will use already 20nm.
I can see your enthusiastic expectations, you cannot rule them out, yes, but think about AMD's last track records... what was expected from Bulldozer and what did we get? Lower your expectations. Then you wont encounter frustrating surprises, there is only the chance of pleasant ones ;-)