Macro is AMD-speak; other companies use different names; this slide just considers macros inside the core (or L2). In general, "macro" means a block built from things other than ordinary standard cells, then packaged up in a way that hides the internals. In particular, they can be things like SRAMs, ROMs, clock logic, PLLs, or PHYs - structures which depend on detailed analog behavior of transitors. Most of the logic in a core is built from standard cells that can be treated as purely digital, so you build e.g. a CPU core in tools that live in the pure-digital world, and package up any more complex circuitry into black boxes that present a digital external interface and hide the analog complexity inside. The two images in the slide you posted show the CPU core the way the digital world sees it - note how the caches are just empty boxes, whereas die photos show structure inside of them.
The only reason anyone would care how many unique macros there are is manpower: it might take 2 engineers to do the standard cell design for a block like the core, but each macro might take another 1-2 engineers.