Kaveri Steamroller vs BulldozerPiledriver

[mikk]

What kind of a BS article was that (the Italian translated). Where did they got those CPU clocks? AMD said that they will "maintain" high frequency engine

The same [rubbish] we heard when AMD said IPC will increase with Bulldozer.

No profanity in the tech forums, please
-ViRGE

 

[inf64]

The same [rubbish] we heard when AMD said IPC will increase with Bulldozer.

So wait, you actually believe that italian BS article? This means you expect (such low clocked) SR to magically have >50% IPC increase over PD in order to actually outperform stock 6800K? Good luck.

 

[Ajay]

This is my main concern for Kaveri, that GFL has yet again dropped the ball and and 28nm is under performing. It makes sense then that AMD went with Kaveri 'B' for, maybe, a 15-20% IPC bump, because the clocks were going to come in low. We always knew that concern; now we just have to wait a few months and see if it real, or if people are just trolling for page hits.

At least GFL looks like they are taking things more seriously by hiring Ana Hunter http://www.linkedin.com/pub/ana-hunter/0/104/349. Though this would just be the start of building a better process development team, if in fact that's what GFL is going to do (which they desperately need to do).

 

[JDG1980]

This is my main concern for Kaveri, that GFL has yet again dropped the ball and and 28nm is under performing. It makes sense then that AMD went with Kaveri 'B' for, maybe, a 15-20% IPC bump, because the clocks were going to come in low. We always knew that concern; now we just have to wait a few months and see if it real, or if people are just trolling for page hits.

GloFo's shortcomings are a real problem for AMD. If it weren't for that albatross of a contract that Hector Ruiz signed, it would probably make more sense to just ditch them altogether and have TSMC do everything. We know they already have a fully mature 28nm process available (and in fact use it extensively for AMD's graphics cards).

 

[Pilum]

This is my main concern for Kaveri, that GFL has yet again dropped the ball and and 28nm is under performing.

Underperforming in what metrics? If the process gives great parametric yields for LP designs <= 2GHz at low wafer costs, then it could turn out be an excellent process for GFL. If AMD would have chosen the wrong designs for the process, that would be AMDs problem, not GFLs. "Process quality" has many different dimensions. Optimal SHP behavior is just one of those, and probably the most unimportant for the vast majority of the market.

It makes sense then that AMD went with Kaveri 'B' for, maybe, a 15-20% IPC bump, because the clocks were going to come in low. We always knew that concern; now we just have to wait a few months and see if it real, or if people are just trolling for page hits.

The B design could also be an attempt to improve high-clock yields on the process. I don't think you can really do micro-architectural changes on short notice; "short notice" meaning <=18 months. The whole process leading from logic design to working, verifified silicon is just too complicated for modern designs of this complexity.

But anyway, the press embargo should lift in early December, so we'll know the facts, good or bad, in a few weeks.

 

[Ajay]

Underperforming in what metrics? If the process gives great parametric yields for LP designs <= 2GHz at low wafer costs, then it could turn out be an excellent process for GFL. If AMD would have chosen the wrong designs for the process, that would be AMDs problem, not GFLs. "Process quality" has many different dimensions. Optimal SHP behavior is just one of those, and probably the most unimportant for the vast majority of the market.

Well, if GFL only has an LP process, then 2.9 GHz + boost would be an excellent achievement; I agree. Still, this is not optimal for AMD; and probably means AMD didn't have the cash to 'supplement' development of an SHP process for their top of the line APUs.

Nonetheless, do you thing things are looking shaky for AMD in terms of overall performance potential or not?

The B design could also be an attempt to improve high-clock yields on the process. I don't think you can really do micro-architectural changes on short notice; "short notice" meaning <=18 months. The whole process leading from logic design to working, verified silicon is just too complicated for modern designs of this complexity.

But anyway, the press embargo should lift in early December, so we'll know the facts, good or bad, in a few weeks.

Sorry, I assumed that their would be tweaks to make better use of the process, thanks for pointing that out. Still, I think AMD may have had the time to switch over to Kaveri 'B' if: A) it was already in development and B) The need was realized early enough and C) the changes were more minor, like another 5% boost in IPC - this is still a design which could probably see 10-15% IPC improvements every year if AMD could run two full staffed design teams for it's leading edge APU products. Sure makes me wish they'd find $10B US in a coffee can buried out by the picnic tables at HQ (OK, I'm not serious, just in case someone is off their meds today).

Lastly, early December - great, let the weeping or rejoicing begin then. Hopefully for AMD's sake, somehow it will be the latter.

 

[tweakboy]

WE can built a whole house with these steamroller or or maverick

 

[NTMBK]

Frankly AMD need IBM to fab their chips for them at this point, not TSMC. They share a common need for high performance SOI nodes- 22nm SOI would make a damn nice Steamroller/Excavator. But of course they're tied to GloFo, and IBM haven't shared their 22nm SOI with the "common platform" club.

 

[SiliconWars]

Frankly AMD need IBM to fab their chips for them at this point, not TSMC. They share a common need for high performance SOI nodes- 22nm SOI would make a damn nice Steamroller/Excavator. But of course they're tied to GloFo, and IBM haven't shared their 22nm SOI with the "common platform" club.

Frankly, you'd be better off not commenting on processes when you clearly don't know enough about it.

 

[Idontcare]

Frankly, you'd be better off not commenting on processes when you clearly don't know enough about it.

No need for such a gruff rebuttal, is there?

We have a policy here, attack the message, not the messenger.

Do you see where your post went awry?

If NTMBK's comments do not bear weight under scrutiny, why not educate him on the matter (and the rest of us in the process)?

 

[NTMBK]

Frankly, you'd be better off not commenting on processes when you clearly don't know enough about it.

Oh I'm sorry, was there some sort of test I was meant to take?

 

[Pilum]

Well, if GFL only has an LP process, then 2.9 GHz + boost would be an excellent achievement; I agree. Still, this is not optimal for AMD; and probably means AMD didn't have the cash to 'supplement' development of an SHP process for their top of the line APUs.

I'm sure they are using the HPP from GFLs 28nm processes. But the 28nm SHP which appeared on roadmaps isn't listed for GFLs current processes; maybe AMD was supposed to pay for development, couldn't, and now has to make do with a process which is suboptimal for their purposes. This is one thing where going fabless doesn't help: if you need a unique process which no other customer wants, you'll still have to fully pay for its development. If you don't have the money, you're out of luck.

On the clockspeeds: I don't think they'll loose 25%. I'd rather excect something like 10%, if that. They are loosing SOI, and that will make it harder to clock high, but it's still a half-node shrink. Just for reference, SPARC T5 on TSMC 28nm seems to top out at 3.6 GHz.

Nonetheless, do you thing things are looking shaky for AMD in terms of overall performance potential or not?

In relation to expectations of Kaveri being some kind of "Intel killer"; yes, I think there's a rather high probability its performance will be "shaky".

In regards to Kaveri turning out to be a solid product for AMD, generating profits over its lifetime: no, I don't see a problem. As an entry-level iGCPU it should deliver good perf/$, if it improves on perf/W, it will be a good solution for mobile as well as some server applications (especially for SeaMicro machines). The strong GPU and HSA will make it attractive in some segments where Intel can't compete right now.

Sorry, I assumed that their would be tweaks to make better use of the process, thanks for pointing that out. Still, I think AMD may have had the time to switch over to Kaveri 'B' if: A) it was already in development and B) The need was realized early enough and C) the changes were more minor, like another 5% boost in IPC -

This doesn't make much sense. It's not really useful to keep CPU designers busy designing a "B" version of an architecture, when they should be working on your next-gen architecture. This is especially true if you're as financially constrained as AMD is.

The only reason to iterate over a basically finished design is when you realize that performance is so bad that you'll have problems selling it at a profit. Otherwise you'd rather take your lumps, ride with the suboptimal design and put everything into improving the future designs. This is what Intel did with Netburst after they realized the concept was fundamentally broken. Likewise, AMD is better off putting all available resources into Excavator.

IMHO, if they really needed to iterate Kaveri, this would point to serious problems remaining in their design workflow.

this is still a design which could probably see 10-15% IPC improvements every year

Uhm, where do you get the 10-15%? These are fantasy values IMO. I think everybody (sane) is agreed that Intel has been pulling off pretty good IPC increases after Core2. However, the total IPC increase between Conroe and Haswell has been "only" some 65% over 7 years. The annual IPC increase is:
1.65^(1/7) = 1.0741 = 7.4%.
This includes the one-time benefit of integrating the IMC in Nehalem (which AMD already did with K8), which was worth maybe 15%; if you exclude the IMC integration, the annual IPC increase is more like:
1.50^(1/7) = 1.0596 = 6%.

If AMD could achieve this kind of average IPC increases for Bulldozer-architectures with their much smaller budget, that would be impressive, but far removed from "10-15% per year".

Well, they could switch over to a much wider design, that would of course improve IPC dramatically (much as Netburst->Core2). If the purported AMD next-gen die-shots of a 4-wide architecture are valid, this is where AMD is headed. But of course we'll have to wait and see the kind of clockspeeds they'll be able to get with a wider architecture, and how they would be able to scale that architecture over time.

if AMD could run two full staffed design teams for it's leading edge APU products. Sure makes me wish they'd find $10B US in a coffee can buried out by the picnic tables at HQ (OK, I'm not serious, just in case someone is off their meds today).

Yep, this is the real problem. You need money to make money, but that is one resource which AMD really doesn't have (and never had, to be honest). It's impressive what they managed to achieve with their limited funds, but as for high-performance designs, they are probably out of the race. Which really doesn't matter for AMD as a company, if they can find other, secure markets. Actually AMD may end up as a more stable company when their transition works out as hoped.

 

[JDG1980]

Uhm, where do you get the 10-15%? These are fantasy values IMO. I think everybody (sane) is agreed that Intel has been pulling off pretty good IPC increases after Core2. However, the total IPC increase between Conroe and Haswell has been "only" some 65% over 7 years.

I think your comparison is flawed because Conroe isn't really the right starting point. Conroe wasn't a new architecture, but an evolution of the Pentium-M design, which in turn was part of a lineage dating all the way back to the original Pentium Pro. In contrast, Bulldozer was a completely new microarchitecture, and very poorly optimized in its original form. What I'm saying is that there is a lot more "low-hanging fruit" for AMD to exploit than there has been for Intel the past couple of years. They can rack up 10%-15% IPC improvements because they're starting from such a bad place. I do expect them to taper off once they reach the Sandy Bridge level, but at that point they will be genuinely competitive with Intel.

 

[Enigmoid]

I think your comparison is flawed because Conroe isn't really the right starting point. Conroe wasn't a new architecture, but an evolution of the Pentium-M design, which in turn was part of a lineage dating all the way back to the original Pentium Pro. In contrast, Bulldozer was a completely new microarchitecture, and very poorly optimized in its original form. What I'm saying is that there is a lot more "low-hanging fruit" for AMD to exploit than there has been for Intel the past couple of years. They can rack up 10%-15% IPC improvements because they're starting from such a bad place. I do expect them to taper off once they reach the Sandy Bridge level, but at that point they will be genuinely competitive with Intel.

Piledriver is still around 5% slower than phenom II.

 

[JDG1980]

Piledriver is still around 5% slower than phenom II.

But it's about 10% faster (per clock) than Bulldozer, which is the relevant comparison here. And PD was a relatively minor tweak; Anand's review describes it as a "light evolution over Bulldozer". Steamroller will bring more significant changes that should see a greater IPC gain. Even if we allow for some exaggeration in AMD's official claims (30%), it seems quite plausible from what we've seen of the design that SR will have roughly 20% greater IPC than PD, and do away with the CMT penalty. And Excavator is going to be another big jump. Yes, AMD is starting from a lower point, but that means they have a lot more opportunities for fast improvement. It's sort of like how developing economies such as China can rack up double-digit growth rates while the US and Europe have trouble breaking 5%.

 

[HisDivineOrder]

But it's about 10% faster (per clock) than Bulldozer, which is the relevant comparison here. And PD was a relatively minor tweak; Anand's review describes it as a "light evolution over Bulldozer". Steamroller will bring more significant changes that should see a greater IPC gain. Even if we allow for some exaggeration in AMD's official claims (30%), it seems quite plausible from what we've seen of the design that SR will have roughly 20% greater IPC than PD, and do away with the CMT penalty. And Excavator is going to be another big jump. Yes, AMD is starting from a lower point, but that means they have a lot more opportunities for fast improvement. It's sort of like how developing economies such as China can rack up double-digit growth rates while the US and Europe have trouble breaking 5%.

I can't tell you how many times I've read people saying this sort of thing about Bulldozer, then Piledriver, and now Steamroller. All to reach Sandy Bridge-levels of performance. That's AMD matching a product Intel fielded over two years ago.

Ivy Bridge added 15% on top of SB and Haswell added another 15% on top of that. Meanwhile, AMD's best hope is to match something done years ago. AMD needs to throw the Bulldozer-derived cores away and start fresh and this time design the CPU by hand without the automation tools that really screwed them this go-round.

 

[SiliconWars]

I can't tell you how many times I've read people saying this sort of thing about Bulldozer, then Piledriver, and now Steamroller. All to reach Sandy Bridge-levels of performance. That's AMD matching a product Intel fielded over two years ago.

Ivy Bridge added 15% on top of SB and Haswell added another 15% on top of that. Meanwhile, AMD's best hope is to match something done years ago. AMD needs to throw the Bulldozer-derived cores away and start fresh and this time design the CPU by hand without the automation tools that really screwed them this go-round.

I'd love to know what reviews you've been reading. Anand says the average improvement for Haswell vs Sandy is under 20%.

 

[PPB]

BD 5% slower than phenom and HW 15% over IB and IB 15% over SB. Oh god, what I am even reading.


I guess this is what happens when you perpetrate meaningless benchmarks like cinebench. Oh well.

 

[SiliconWars]

Actually even in Cinebench Haswell is only 16% faster than Sandy Bridge.

http://www.anandtech.com/show/7003/the-haswell-review-intel-core-i74770k-i54560k-tested/6

17% overall, quite a difference from 15%+15%. Also note the biggest gap (27%) was with the questionable PCMark benchmark. In reality 10-15% would be closer to the mark.

 

[avtek21]

A picture of 3.5 ghz Kaveri APU sample...will it Steamroll the competition?

:
http://vr-zone.com/articles/heres-look-kaveri-apu-engineering-sample/62565.html

 

[inf64]

^^ Already posted in Kaveri topic.