Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

Golden Member
Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.




Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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SiliconFly

Golden Member
Mar 10, 2023
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If it isn't affected, why is 18A performing like 20A over Intel 3, rather than getting the extra 10% as promised? Maybe they canned the extra work for the 10%.
I don't think it's even possible for them to ditch the extra 10% performance they mentioned for 18A even if they want. PDK 0.9 was released more than a year ago.

Maybe with 14A they’ll get that 10pct back!
(Wishful thinking right there).
Many believe 14A is gonna be awesome. On the contrary, 14A is expected to be the world's first High-NA EUV node. Regular EUV itself was very challenging. And I'm sure High-NA is gonna be a b***h! Intel getting everything right on the first time including PPA, Yield, Capacity, On-time Ramp, etc is very very unlikely. I wouldn't bet too much on 14A.

Look at TSMC, they aren't getting much of a shrink with N2 and A16 either. You can quibble over the node naming, but linear scaling is running out of gas. Once they've both gone CFET, we'll have to go 3D or post silicon to further improve density.
True!
 
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Reactions: Joe NYC

SiliconFly

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Mar 10, 2023
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... for Intel, to live up to their claims. That wish is evaporating little by little every day.
Little by little is an understatement. Their current financials look bleak at best. Too much investments in foundries & not much returns. They'll soon sink if they can't arrest the leak.

Funny thing is, Intel has now very clearly demonstrated beyond any reasonable doubts that their client/server products division can thrive without their own foundries!

I'm now praying that they cut IFS lose before it pulls everything down!

... AMD still pursues the clockspeed is king approach, they'll follow Intel to the grave too.
I was under the assumption Zen 5 will easily crush this gen Intel parts outright based on their past execution. But now they're looking worse than Intel.
 
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Hitman928

Diamond Member
Apr 15, 2012
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I know it's not leading edge fabs, but this is the closest thread for this news. TI announced they are receiving $1.6B in funding from the CHIPS act and ultimately expects to receive between $6B - $8B in additional tax credit to help finance the building/expanding of 3 fabs. The fabs nodes are in the 28 nm - 130 nm range which may not be very exciting, but these nodes are still in very commonly used in analog/RF/IoT designs.

 
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