Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel)

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DisEnchantment

Golden Member
Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.




Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.
 

moinmoin

Diamond Member
Jun 1, 2017
4,993
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ASML would only do so if there were sanctions. Since there won't be...
There already are sanctions on PR China preventing ASML to deliver and service its current and future state of the art products. PR China extending its controlling reach to Taiwan would at the very least extend those existing sanctions to Taiwan as well. And that's assuming that's the only problem a PR China wilfully accelerating the crisis would cause, which it by far won't.
 

jpiniero

Lifer
Oct 1, 2010
14,806
5,431
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There already are sanctions on PR China preventing ASML to deliver and service its current and future state of the art products. PR China extending its controlling reach to Taiwan would at the very least extend those existing sanctions to Taiwan as well. And that's assuming that's the only problem a PR China wilfully accelerating the crisis would cause, which it by far won't.

It's a little different when theoretical sanctions on a China TSMC would cause a huge amount of disruption for US companies, as already mentioned in this thread.

You'll notice that they've already sorta caved on the AI "sanctions"... and that's despite that there's likely a good reason the sanction talk came up in the first place. The MIC must be freaking out what China's got cookin.
 

Joe NYC

Platinum Member
Jun 26, 2021
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There already are sanctions on PR China preventing ASML to deliver and service its current and future state of the art products. PR China extending its controlling reach to Taiwan would at the very least extend those existing sanctions to Taiwan as well. And that's assuming that's the only problem a PR China wilfully accelerating the crisis would cause, which it by far won't.
Not being to sell to China AND Taiwan would probably bankrupt the entire ASML ecosystem.
 

Doug S

Platinum Member
Feb 8, 2020
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Interesting. What is that density for? Logic only? Logic-SRAM-Analog mix? HD cells?

Density of Apple A17 Pro on N3B is 184 mm². This is a mixed density value with SRAM, Logic and Analog.

Density of test chips is always (wildly) overstated. A few years back TSMC was claiming around 300 million transistors per mm^2 for N3/N3B. And David Kanter wrote a whole article about how flawed that metric is even if the test chips being compared were identical.
 

DrMrLordX

Lifer
Apr 27, 2000
21,770
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No. Usually delays cascade, but a totally new line avoids that, because it doesn't have to deal with market forces.
Then how is that relevant to the fact that Intel cancelled every product of theirs on Intel 4 except for a heavily-delayed Meteor Lake that isn't a very good product?
 
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DavidC1

Senior member
Dec 29, 2023
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Then how is that relevant to the fact that Intel cancelled every product of theirs on Intel 4 except for a heavily-delayed Meteor Lake that isn't a very good product?
Some of the lackluster results are due to the process, I wouldn't doubt. But mostly it's the design.

I won't be surprised if it's the same with 20A and 18A, where 20A underperforms, and why they might be using N3 for certain Arrowlake variants. That would mean Intel 3 and 18A would be greater advancements on a product level than papers suggest otherwise.

Further evidence is Intel themselves admitting that they will be behind up until 20A - after that they'll be ahead. Checking boxes for features such as RibbonFET and PowerVia is nice, but whether it's the best implementation of it is a different story. For example, Intel didn't need copper interconnect on 0.18u to significantly outperform the 0.18u copper process AMD was using. The drive current differences were in upwards of 30% in favor of Intel!

They say the devil is in the details, and RibbonFET and PowerVia are not those. If those were the only criteria, why would they say it takes until 2025 to have unquestioned leadership?

By the way the guy claiming 400MT density for 20A seems to be from SeekingAlpha, so take it with a grain of salt. Although in the article he mentions Bob Swan talking about 5nm(logically would be the previous name for 20A) being 2x the density, so we'll see.
 
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Aapje

Golden Member
Mar 21, 2022
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Not being to sell to China AND Taiwan would probably bankrupt the entire ASML ecosystem.
It's too big and important to fail.

The US and the Western world at large has too much at stake to let it implode and they will do whatever it takes. If needed, there will be massive subsidies to replace Taiwan manufacturing.

The elites have already discussed this in the secret rooms at Davos or whatever, which is why we now have the CHIPS Act in the US and the European Chips Act in the EU. Apparently, Japan is also doing something. So they are reducing the costs of a breakup with Taiwan with these policies.

Of course, these things take time to pull off and we are more fragile right now than we'll be in the future. Consumers will definitely be hit very hard if China invades Taiwan. But it seems pretty clear to me that the result of an invasion is going to result in massive deinvestments from China, which is a huge risk to the leadership of China. Note that there are already companies that move manufacture out of China, although that is in part because China has become too rich, so their salaries are getting higher:


Note that this would just be a repeat of history. Japan used to be a low-salary manufacturing country until they got too rich and manufacturing moved to China.
 

Joe NYC

Platinum Member
Jun 26, 2021
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It's too big and important to fail.

The US and the Western world at large has too much at stake to let it implode and they will do whatever it takes. If needed, there will be massive subsidies to replace Taiwan manufacturing.

The elites have already discussed this in the secret rooms at Davos or whatever, which is why we now have the CHIPS Act in the US and the European Chips Act in the EU. Apparently, Japan is also doing something. So they are reducing the costs of a breakup with Taiwan with these policies.

Of course, these things take time to pull off and we are more fragile right now than we'll be in the future. Consumers will definitely be hit very hard if China invades Taiwan. But it seems pretty clear to me that the result of an invasion is going to result in massive deinvestments from China, which is a huge risk to the leadership of China. Note that there are already companies that move manufacture out of China, although that is in part because China has become too rich, so their salaries are getting higher:


Note that this would just be a repeat of history. Japan used to be a low-salary manufacturing country until they got too rich and manufacturing moved to China.

It's one thing to for the West to try to build an Iron Curtain around China. If Taiwan is added, then there is a lot less left on the West's side of Iron Curtain than on Chinese side.

If ASML business were to shrink to less than 33% of original, it would take an order of magnitude greater amounts than the Chips Act to keep the entire ASML (+ other semi equipment) ecosystem on subsidy life support.
 

Aapje

Golden Member
Mar 21, 2022
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If ASML business were to shrink to less than 33% of original, it would take an order of magnitude greater amounts than the Chips Act to keep the entire ASML (+ other semi equipment) ecosystem on subsidy life support.
ASML et al will be busier than ever if Taiwan gets annexed and the West starts building a ton of chip factories in the US, EU and Japan.
 

H433x0n

Golden Member
Mar 15, 2023
1,040
1,205
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Some of the lackluster results are due to the process, I wouldn't doubt. But mostly it's the design.

I won't be surprised if it's the same with 20A and 18A, where 20A underperforms, and why they might be using N3 for certain Arrowlake variants. That would mean Intel 3 and 18A would be greater advancements on a product level than papers suggest otherwise.

Further evidence is Intel themselves admitting that they will be behind up until 20A - after that they'll be ahead. Checking boxes for features such as RibbonFET and PowerVia is nice, but whether it's the best implementation of it is a different story. For example, Intel didn't need copper interconnect on 0.18u to significantly outperform the 0.18u copper process AMD was using. The drive current differences were in upwards of 30% in favor of Intel!

They say the devil is in the details, and RibbonFET and PowerVia are not those. If those were the only criteria, why wouldn't they say it takes until 2025 to have unquestioned leadership?

By the way the guy claiming 400MT density for 20A seems to be from SeekingAlpha, so take it with a grain of salt. Although in the article he mentions Bob Swan talking about 5nm(logically would be the previous name for 20A) being 2x the density, so we'll see.
The latest Specint results taken by David Huang seem to backup the claims made by Intel in their technical documents for Intel 4 (roughly ~20% perf/watt).

I don’t know where that puts them relative to TSMC. I don’t know if there’s a good way of accurately judging the relative performance against N4P.

Intel’s use of 6VT cells for most of the compute tile sans 2x PCores is encouraging too. Went from UHP cell spam to HP cell spam.
 

Curious_Inquirer

Junior Member
Sep 5, 2022
21
54
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https://www.semianalysis.com/p/intel-genai-for-yield-tsmc-cfet-and Dylan and his team over at SemiAnalysis produced another banger with findings and research at International Electron Devices Meeting (IEDM) regarding the future of semiconductor manufacturing. Lots of fun stuff with transistor design and new materials used in making them. This time most of it isn’t behind the paywal.
 

FlameTail

Platinum Member
Dec 15, 2021
2,971
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ASML et al will be busier than ever if Taiwan gets annexed and the West starts building a ton of chip factories in the US, EU and Japan.
If we assume not only TSMC, but Samsung also gets gutted in an escalation...

Which company then is going to build all those fabs in US and EU?

Intel? If so, they'll become a foundry monopoly.

Maybe GlobalFoundries will start competing in the leading edge again, like a man who came back from the dead.

In the meantime, Japan's got Rapidus.
 

DrMrLordX

Lifer
Apr 27, 2000
21,770
11,089
136
Maybe GlobalFoundries will start competing in the leading edge again, like a man who came back from the dead.
Second source! Oh that would be poetic justice for it to happen to Intel twice.

Realistically-speaking, TSMC execs probably have contingency plans to exfiltrate key IP in the event of . . . some sort of geopolitical upheaval. Not that we should derail the thread with such talk.
 

DavidC1

Senior member
Dec 29, 2023
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524
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The latest Specint results taken by David Huang seem to backup the claims made by Intel in their technical documents for Intel 4 (roughly ~20% perf/watt).
His results deviate significantly from the other Chinese review. Can't rely on laptop tests especially when it has such immature firmware that performance is significantly impacted. When was the last time that went from a rumor to a true story?
 

FlameTail

Platinum Member
Dec 15, 2021
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Why would Samsung get gutted? The core of their company is in Korea.

I can see them dancing on TSMC's grave actually, especially if they manage to smuggle some of the key TSMC workers out of Taiwan and put them to work for Samsung.
Such an escalation not only involves China-Taiwan, but also potentially North Korea-South Korea.
 

Aapje

Golden Member
Mar 21, 2022
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Such an escalation not only involves China-Taiwan, but also potentially North Korea-South Korea.
We see in Ukraine that we are in a situation where defense is king, like in WW 1. North probably can't get through the extensive defenses, especially if South Korea mobilizes.
 

Dayman1225

Golden Member
Aug 14, 2017
1,153
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IFS customer announced, Valens Semiconductor for automotive ADAS chips using “advanced process nodes”




 
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Thibsie

Senior member
Apr 25, 2017
794
861
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IFS customer announced, Valens Semiconductor for automotive ADAS chips using “advanced process nodes”




Mmm no info about the node... 🤔
 

FlameTail

Platinum Member
Dec 15, 2021
2,971
1,664
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I just saw this summary of Zen5:
Features touted by AMD:
  • New grounds-up microarchitecture
  • Enhanced performance and efficiency
  • Re-pipelined front-end and wide issue
  • Integrated AI and Machine Learning optimizations
What is that last line referring to feature wise?
Matrix processing units?

Edit: why this thread...
 
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