Logic design, processors, and HDLs

[Special K]

I am just beginning to study logic design, and I had a few questions:

1. Since digital devices are made of gates, does that mean that even the most complicated design (for example, a P4 or AXP processor, or one of nvidia's GPUs) could be represented graphically as a collection of only NAND gates? This may be a dumb question but when I see the schematic for something like a full adder, it's fairly straightforward to see how the individual gates interact to compute the sum of two numbers. It seems almost impossible, however, to be able to trace through gates to demonstrate the operation of a complete processor.

2. Do the companies such as Intel, AMD, and nvidia use languages such as VHDL and Verilog to design their devices? Does Intel just have a file on one of their workstations called Pentium 4.vhd?

 

[muttley]

Gates are just part of the structure. As you get further you find they are lacking. So, as an example of a 5 volt gate system. There are just 2 states but lets make it more efficient and add a third state, a floating state where around 2.5 volts it is neither on or off, 1 or zero, or whatever you want to call it. Now this was just the beginning of processor evolution or one slick trick and there are more depending how far you get into the understanding. Back in my time we had to fix the boards and now you just toss a PC board or powersupply or such and thats it. 6 layer boards you can't fix the old ones you could depending.

muttley

 

[Sohcan]

The EEs around here will be able to give a more concise explanation (since I'm in comp architecture), but since they're not around yet, I'll get the ball rolling.

does that mean that even the most complicated design (for example, a P4 or AXP processor, or one of nvidia's GPUs) could be represented graphically as a collection of only NAND gates?

Any Boolean logic circuit can be entirely expressed using NAND gates, but IIRC the most elementary logic gates used in CMOS are NAND, NOR, NOT, and the transmission gate. Also keep in mind that in circuit design, circuits aren't necessarily a one-to-one translation of the basic logic gates into their CMOS counterparts, there is a lot of optimization involved (hence the benefit of full-custom design). For example, a simple function, such as (a * b + c)' (note the complement) can be expressed using one NAND gate, one NOR gate, and one NOT gate...NAND and NOR require four transistors, and NOT two, making the total 10 transistors. Using a single pull-up/pull-down CMOS network, the same function can be expressed using six transistors. Here's a brief web course on VLSI design; chapter 3 touches upon full-custom design of more complex CMOS gates.

It seems almost impossible, however, to be able to trace through gates to demonstrate the operation of a complete processor.

I doubt anyone can conceive the entire physical operation of the millions of gates in a modern MPU in tandem...you'll have a much easier time grasping the overall operation of an MPU at the architectural level rather than the circuit level.

Do the companies such as Intel, AMD, and nvidia use languages such as VHDL and Verilog to design their devices?

I'm pretty sure Intel uses a proprietary HDL for the RTL phase...I don't know about the other companies you mentioned.

 

[pm]

Originally posted by: SpecialK
I am just beginning to study logic design, and I had a few questions:

1. Since digital devices are made of gates, does that mean that even the most complicated design (for example, a P4 or AXP processor, or one of nvidia's GPUs) could be represented graphically as a collection of only NAND gates? This may be a dumb question but when I see the schematic for something like a full adder, it's fairly straightforward to see how the individual gates interact to compute the sum of two numbers. It seems almost impossible, however, to be able to trace through gates to demonstrate the operation of a complete processor.

2. Do the companies such as Intel, AMD, and nvidia use languages such as VHDL and Verilog to design their devices? Does Intel just have a file on one of their workstations called Pentium 4.vhd?

You could represent any digital design, Pentium 4 included, as a sea of NAND's. This would only be a representation - not the actual reality - and I can't imagine why you would want to do this since it would immensively confusing to try to follow the logic flow on through the circuitry, but you could definitely do it.

Intel uses a proprietary HDL language. I have worked at other companies and they used either in-house HDL or Verilog. There is a file somewhere that corresponds to "Pentium 4.vhd", but it would be just a hierarchy file that only calls other files with very little code in it.

 

[Special K]

This would only be a representation - not the actual reality

What exactly do you mean by this? What is the actual reality?

Also what is done once the design file is completed? (how does it go from a file to actual silicon?)

 

[CTho9305]

I think the layout is not present in the representation. It is a description of gates and their connections. These could be layed out in many different ways. Also, there is more than one possible arrangement of transistors to make each gate, although I dont know if they use different ones.

 

[bhakasur]

Design flow for general IC's is :

RTL (VHDL/Verilog/ or both/proprietry HDL) -----> Gates ------> Placed Gates (floorplan) -----------> Transistors (layout)

Companies generally use libraries which map RTL to gates conforming to a specific process (eg TSMC .18 micron)

Microprocessor Design is generally fully custom design (im not sure of this)
i.e companies like INtel/AMD work on transistors directly for a more optimized design
Im sure they do RTL design to but mostly to verify and simulate the design in the intial stages.

i hope this helps

srs