Question Meteor Lake Roundup

[SiliconFly]

A phoronix leak says: Linux kernel graphics driver patch posted by Intel confirms L4 cache on upcoming Meteor Lake called "Adamantine" cache.

Not much is known about this, but rumors suggest that L4 will be part of the base tile, an active interposer. Which means, it may not be very similar to rambo cache. Or is it?

 

[A///]

this sounds like the rumor that came out last week and has been heatedly debated in the threads. a new slide has leaked but there is no info outside of basics.

 

[SiliconFly]

Thought so. Cos it sounds too good to be true.Actually, is it actually possible to have sram on an intrposer which is supposed to supply power & handle data interconnect with various tiles?