Modules are more effective than hyperthreading, right?

[pantsaregood]

Bulldozer sucks. Everyone is aware of it.

While a core is sharing resources, it performs at about 80%. That implies a module provides ~160% the power of a dedicated single-core.

HyperThreading gains seem to peak at around 30%, and average something like 20%. That puts HyperThreading at ~120% single-core performance.

Was the module idea actually a good method to implement threads? Bulldozer cores just plain suck. They don't suck because of the module design.

If Sandy Bridge cores were used in place of BD cores, could a module-based design be functional?

Then again, maybe there's some die size issue here.

 

[NostaSeronx]

Bulldozer sucks. Everyone is aware of it.

While a core is sharing resources, it performs at about 80%. That implies a module provides ~160% the power of a dedicated single-core.

Resources aren't shared per se

HyperThreading gains seem to peak at around 30%, and average something like 20%. That puts HyperThreading at ~120% single-core performance.

Hyperthreading allows a thread to use under utilized resources while in Cluster Multithreading it makes two threads use something that is generally overly utilized and does it worse than hyperthreading

Was the module idea actually a good method to implement threads?

Cores you mean and no it wasn't for AMD to be competitive they need a 1 Core/1 FPU ratio with the same ISAs as Intel and newer architecture than Stars and Bulldozer

If Sandy Bridge cores were used in place of BD cores, could a module-based design be functional?

Nope as you noticed with a smaller die 180~mm²
Sandy Bridge is faster 99% of the time than something that is almost double its size

Then again, maybe there's some die size issue here.

It is a design flaw and a big one

No ISA will improve AMD Bulldozer none it will only get outclassed by Sandy Bridge and Ivy Bridge and once Haswell comes out the stake would be shoved deep into the Undead heart of AMD

IPC decreases by 10% with Piledriver
IPC decreases by 25% with Steamroller
IPC decreases by 50% with Excavator

 

[IntelUser2000]

IPC decreases by 10% with Piledriver
IPC decreases by 25% with Steamroller
IPC decreases by 50% with Excavator

Ok, let's not start trolling or create a flame war.

Hyperthreading allows a thread to use under utilized resources while in Cluster Multithreading it makes two threads use something that is generally overly utilized and does it worse than hyperthreading.

You can't attribute that to enable/disable of CMT. It's possible it lead to the issues which make it perform as the chip does today.

Resources aren't shared per se

Resources ARE shared, its just shared less. It's a "Reverse Hyperthreading" in that rather than adding x% resources for more performance, it takes out x% out of two cores. AMD calling it dual core is justified.

If Sandy Bridge cores were used in place of BD cores, could a module-based design be functional?

Can't compare the two. One's a module and one's a core. We don't know.

(I need to stop posting for today, heh)

 

[Vesku]

The module design kept to AMD's predicted 20% penalty, so that's good. The cores after module penalty in FX chips run like their 3-4 year old cores for current desktop workloads, that's bad. FX turbo is well implemented, that's good. The GF 32nm process seems pretty leaky once you get into the high 3GHz, that's bad.

AMD says they are targeting significant improvement with Piledriver, that's good. A large chunk of that improvement seems based on expectations that GF 32nm process will improve and allow higher clocks and better power efficiency, that's a gamble.

 

[Soulkeeper]

I've never been a big fan of hyperthreading and I think the module design was a good idea on paper.
It's the implementation and refinement that are to blame imo.

 

[IntelUser2000]

I think Hyperthreading is underestimated. The sole enabling allows both desktop and server Intel chips to outperform AMD's processors, when otherwise it wouldn't have. If Sandy Bridge didn't have it, both the Phenom II X6 and FX-8150 would have made more sense on multi-threaded workloads.

 

[pantsaregood]

I think you guys misunderstood the question.

The module design seems like a good idea for multithreading. It just happens to be poorly applied to BD, given that BD IPC just sucks.

 

[Idontcare]

I think you guys misunderstood the question.

The module design seems like a good idea for multithreading. It just happens to be poorly applied to BD, given that BD IPC just sucks.

In theory, there is no difference between theory and practice. But, in practice, there is.

(source: someone, google seems confused as to who came up with it first)

Hyperthreading sucked in Prescott too. Didn't mean hyperthreading sucked. They just chose a poor test vehicle to showcase it with.

The same might be true of CMT and AMD's bulldozer.

 

[Ares1214]

I think the reason AMD named all these CPU's after construction machines is because they are digging themselves a bigger hole with each new release.

 

[lehtv]

Ka-powwww

 

[podspi]

I really appreciate HT in my Atom. Check out the ST vs. MT benchmarks there:

http://www.anandtech.com/bench/Product/79

Is there any truth to the benefit of HT decreasing as the front-end of these CPUs keep improving?

Anyway, if the module-formation really saves die space, I shudder to think how large an actual eight-core BD would be...

Unfortunately for AMD, there is no Banias plan B. Hopefully they'll get a lot more than 10% out of Piledriver.

 

[Idontcare]

Is there any truth to the benefit of HT decreasing as the front-end of these CPUs keep improving?

Could be another one of those cases where in theory it should but in practice it never does/will.

Unfortunately for AMD, there is no Banias plan B. Hopefully they'll get a lot more than 10% out of Piledriver.

Do we know this for certain?

My concerns for AMD's future lie not with the architecture, they have bright people who can come up with whiz-bang designs just as well as the other guy.

Rather, my concern is that when they get to their whiz-bang architecture they won't have access to a whiz-bang process node to produce it with.

 

[soccerballtux]

In theory, there is no difference between theory and practice. But, in practice, there is.

(source: someone, google seems confused as to who came up with it first)

Hyperthreading sucked in Prescott too. Didn't mean hyperthreading sucked. They just chose a poor test vehicle to showcase it with.

The same might be true of CMT and AMD's bulldozer.

the problem here is the scheduling kills 20% of single threaded performance. That didn't happen with Hyperthreading it was like 5% tops (no?) and is now like 1-3% (guessing). IE not tradeoff, only net positive.

 

[Vesku]

Hyperthreading adds 5% die area to increase in performance by -5% to +20%. The CMT module design adds 12% die area for a second integer unit and restructures the design to have a shared front end for +80% increase in performance. Unfortunately +80% of pretty poor is just poor.

There are some indications that utilizing the new instructions BD brings will see some nice gains. Personally, I think I'll be waiting for the second generation and seeing how software runs on it at that time (6-12 months from now).

 

[AtenRa]

the problem here is the scheduling kills 20% of single threaded performance. That didn't happen with Hyperthreading it was like 5% tops (no?) and is now like 1-3% (guessing). IE not tradeoff, only net positive.

Nope, we get 80% of the CMP, we dont loose 20% in single thread.

4Modules/4 Cores = CMP 100%
2Modules/4 cores = CMT 80%

 

[NostaSeronx]

Nope, we get 80% of the CMP, we dont loose 20% in single thread.

4Modules/4 Cores = CMP 100%
2Modules/4 cores = CMT 80%

We lose 20% in total single thread performance

+10% , +10% when the both cores are active

But to the person who you quoted

We don't lose 20% from bad scheduling we lose 5% or did you miss the windows 8 benchmarks that showed pretty much show no gain

 

[podspi]

Could be another one of those cases where in theory it should but in practice it never does/will.



Do we know this for certain?

My concerns for AMD's future lie not with the architecture, they have bright people who can come up with whiz-bang designs just as well as the other guy.

Rather, my concern is that when they get to their whiz-bang architecture they won't have access to a whiz-bang process node to produce it with.

Probably not (or at least, not like Intel does and likely will), but I don't see that as much of a problem. Intel likes its margins, and that gives its competitors a lot of space to compete... hopefully.

Really if this isn't the case, then AMD isn't the only one going down. Everybody else who competes in the space will too.

 

[pantsaregood]

Hyperthreading adds 5% die area to increase in performance by -5% to +20%. The CMT module design adds 12% die area for a second integer unit and restructures the design to have a shared front end for +80% increase in performance. Unfortunately +80% of pretty poor is just poor.

There are some indications that utilizing the new instructions BD brings will see some nice gains. Personally, I think I'll be waiting for the second generation and seeing how software runs on it at that time (6-12 months from now).

I'm not asking if Bulldozer cores are good. They aren't.

HyperThreading was first implemented in Netburst. Netburst was garbage.

HyperThreading was re-implemented with Nehalem. The idea was good with Netburst and sometimes caused decent gains. Netburst was still bad.

Is the module idea bad, or is it just the fact that BD cores are weak?

 

[jacktesterson]

 

[ocre]

I was thinking about this last night before bed. A funny thing came to mind. Waaay back when.....

Many many years ago in the p3/p4 times, intel (pat gelsinger, etc) was touting Hyperthreading as the future. They implemented it into the P4 but when conroe came in the picture hyperthreading was absent. I remember many ppl talkn smack and laughing referencing intel's hyperthreading is the future quotes. It was a laughing stock. This reaction was mostly intels own fault. They really hyped HyperThreading up to the biggest bestest thing ever and for this they were the cause of the ridicule.

the p4 (netburst) wasnt panning out. Intel abandoned this path entirely and at a great speed they found a new promising road. Conroe was derived from an entirely different ultra low powered design. Intel seen the potential and went with it full force. Hyperthreading wasnt abandoned, there just wasnt justifiable time to implement it. Conroe was extremely capable even without it. As time passed intel eventually implemented hyperthreading back into their new architectural design path and it is no joke. We all can see now, Hyperthreading is not something to laugh at.

Hyperthreading sucked in Prescott too. Didn't mean hyperthreading sucked. They just chose a poor test vehicle to showcase it with.

The same might be true of CMT and AMD's bulldozer.

Hyperthreading does a lot more today than on the P4 not solely because netburst sucked so bad. Programs are much much more threaded today than ever. Original hyperthreading would scale up to 30%, but only in super rare cases. Cases like the BD excels. Intels idea wasnt bad, its just that it was out of place. Had intel kept the netburst path, AMD would be a much much more successful company today. Intel's hyperthreading was out of place in the times. Intel even pursued software compilers that they hoped could create pseudo-multithreading in programs of the day. Sounds a little like the boat AMD is in. The software of these times are not gonna take advantage of BD. Intel couldnt win even with compilers, AMD isnt gonna get the software coded in the way it needs to make BD shine.

In the end intel had to shelf their hyperthreading, although not a bad concept in any way. Intel moved to a completely new more capable design for the programs of those times. Hyperthreading has proved its worth, and is very great in todays programs. AMD cannot do what intel couldnt. AMD needs to design around what is current, even if the BD will excel in the future. When those times are here, AMD will have a huge leg up. Until then they need to take what they can learn and find better ways to handle the majority of software the exist right now in todays times.

just my two cents!

 

[aigomorla]

no u guys ... this is intel's 3rd generation hyper threading.

the first generation came at p4.. failed horribly.... ask anyone.. u needed roughly 10ghz to see a benifit on netburst with ht on a p4... theoretically IMPOSSIBLE.

then on C2D they got rid of HT entirely... due to not enough cache and other limitations on the modified P3 cpu they so dub'd the C2D.

The second generation HT came on i7's.... and believe me, they were nice, but NOT PERFECT. they had problems with schedulers... where the HT cores would pick up b4 the actual physical cores.... it took 2 generations of perfection to get....

3rd generation HT you guys get on SB.


Intel has struggled though roughly 7 yrs with monkeying with HT, failed once... almost failed twice... to get working.

If it took Intel this long... i would assume it would still take AMD half the time by not repeating in intel's mistakes...

 

[ocre]

the c2d was directly related to their mobile cpus. It was derived from the pentium M (original core technology).

10ghz to see hyperthreading benefits from netburst? Where did you get this?

Although hyperthreading was in its infancy, one of its biggest hold up was the lack of parallel threads for it to take advantage of properly. Intel had shown good improvements in cherry picked scenarios but in the majority of real world applications it was useless. Intel worked on a compiler that they hoped would give their hyperthreading an advantage in a time where it wasnt very useful. They shelved it and it would be yrs before they reintroduced it. By then it was a time when parallel threads were the norm.

 

[aigomorla]

the c2d was directly related to their mobile cpus. It was derived from the pentium M (original core technology).

10ghz to see hyperthreading benefits from netburst? Where did you get this?

P3 were the mobile cpu's, what do you think the first doltan and yonah's were?

http://en.wikipedia.org/wiki/NetBurst_%28microarchitecture)

"Despite these enhancements, the NetBurst architecture created obstacles for engineers trying to scale up its performance. With this microarchitecture, Intel looked to attain clock speeds of 10 GHz, but because of rising clock speeds, Intel faced increasing problems with keeping power dissipation within acceptable limits."

that 10ghz number i heard is where it was theoretically supposed to work.

And your last comment applies because cpu's started to have more cores.

 

[jhu]

no u guys ... this is intel's 3rd generation hyper threading.

It's actually 4th or 5th since Itanium has had hyperthreading for the most recent two generations.

 

[aigomorla]

It's actually 4th or 5th since Itanium has had hyperthreading for the most recent two generations.

^ i stand corrected... i completely ignored the Godtanium's.. D: