More leaked Phenom benchmarks

[lyssword]

the difference I noticed is 1.182volts for this proc to go 3ghz, compared to the site that benched crysis, which had phenom at 1.5+ volts in cpu-z.

 

[Viditor]

Originally posted by: dmens

But I certainly think it's easily possible...

easily? please elaborate

The "elements" of K10 are far more impressive than the early benches we've seen. Just like with the Thouroughbred A when it was released, it's quite possible that the design needs some serious tweaking (or it could be a bios issue).

K8 compared K10:

K8 = 64bit SSE execution......................K10 = 128bit SSE
K8 = 16byte Instruction fetch.................K10 = 32byte Instruction fetch
K8 = 2x64 bit Northbridge/L2 bandwidth..K10 = 2x128 bit Northbridge/L2 bandwidth
K8 = 36 x 64bit FP ops...........................K10 = 36 x 128bit FP ops

Of course there's also the native quad core feature, but my point is that all things being equal, we should be seeing K10 performing MUCH faster than K8...so why haven't we yet?
To me, a good analogy is T-Bred A&B.
The Tbred A was released in June 2002 at a top speed of 1.8 GHz, and it was a hot pig.
Tbred B was released 10 weeks later, and it had a 25% improvement of clockspeed and much lower temps.

Edit: BTW, I'm not saying it's a foregone conclusion that they will be able to tweak the K10 as quickly as they did Tbred, in fact they may not be able to fix the problems at all!
That said, it's equally wrong to say that they won't or even that they haven't...
That's my point about these early benches being run on Engineering samples and early bioses.

 

[dmens]

there's no such thing as "serious tweaking" now that the product is out in the wild

also, cherry-picking specific resources on the core for a comparison with K8 doesn't mean anything, especially minor factors such as instruction fetch width, or specialist resources like SSE.

 

[Viditor]

Originally posted by: dmens
there's no such thing as "serious tweaking" now that the product is out in the wild

Yeah...that's what they said about Tbred too...

Cherry picking? OK, I'll continue then...

1. Improved branch predictor - "The global history register now tracks the last 12 branches, instead of the last 8. Barcelona also adds a new indirect predictor, which is specifically designed to handle branches with multiple targets (such as switch or case statements)"

2. Improved SSE performance - "In Barcelona, 128 bit SSE computations now decode into a single micro-op, rather than two; this makes the rest of the out-of-order machinery, such as the re-order buffer and the reservation station more effective. The same goes for integer and FP conversions, and 128 bit load instructions, which are needed to complement the new SIMD capabilities. Note that 128 bit stores still create 2 micro-ops. Another tweak that AMD added is support for unaligned SSE memory accesses, which help more efficiently fetch instructions by packing code more densely"

3. Decode efficiency - "AMD introduced a side-band stack optimizer to remove these stack manipulations from the instruction stream, similar to the dedicated stack engine in the Pentium M. Both MPUs use two registers, ESPO and ESPD (this is Intel?s terminology). ESPO is the original value for the stack pointer and is held in a register in the out-of-order machine, while ESPD, the delta register, tracks changes made to ESP and is in the front-end. Since ESP is an architecture register, a special micro-op is provided to recover ESP from ESPO and ESPD, although the use of this ?fix up? operation is minimized in Barcelona. When a stack modifying instruction is detected, it is removed and resolved by a dedicated ALU which modifies ESPD. This means that many stack operations can be processed in parallel, and frees up the reservation stations, re-order buffers and regular ALUs for other work. The benefits of this technique are highly workload dependent, but AMD and Intel agree that usually 5% of the micro-ops can be eliminated"

4. More efficient ALUs - "integer division is now variable latency, depending on the operands. IDIV instructions are handled through an iterative algorithm. In the K8, each IDIV would go through a fixed number of iterations ? regardless of how many were required to achieve the final result. 32 bit divides took 42 cycles, while a full 64 bit divide required 74 cycles to calculate. In contrast, Barcelona only iterates the minimum number of times to produce an accurate answer. The latency for Barcelona is generally 23 cycles, plus the number of significant bits in the absolute value of the dividend (unsigned divides are roughly 10 cycles faster). Additionally, the third ALU pipeline now handles the new LZCOUNT/POPCOUNT instructions"

5. Memory access reordering (similar to Intel's) - "In the K8, memory accesses were issued in-order, so if a load could not issue, it also stalled every subsequent load or store operation. Barcelona offers non-speculative memory access re-ordering. What this really means is that some memory operations can issue out-of-order"

Please let me know if you need still more differences...

 

[imported_seferio]

I seriously doubt that Phenom is going to magically start matching the performance of Penryn. However, at the same time you have to look at certain settings that they're benching the Phenom X4 at. We'll have to wait and see how faster ram DDR2-1066 or lower latency RAM has an effect on K10, and maybe keep a close watch on HT and the speed of its L3.

 

[dmens]

Originally posted by: Viditor
Yeah...that's what they said about Tbred too...

i stand by my statement. holding your breath for a giant frequency push (not so easy these days with all the new constraints), or some magical performance boost through the BIOS (?!?) or "enabling resources on the core" is pretty much wishful thinking.

 

[Viditor]

Originally posted by: dmens

Originally posted by: Viditor
Yeah...that's what they said about Tbred too...

i stand by my statement. holding your breath for a giant frequency push (not so easy these days with all the new constraints), or some magical performance boost through the BIOS (?!?) or "enabling resources on the core" is pretty much wishful thinking.

New constraints? As I recall, the Tbred answer was to add an extra layer...expensive, but successful.
As to the bios and enabling sources on the core, IIRC, the difference between rev B1 and BA of Barcelona was to fix a Northbridge/L2 bandwidth issue (allowing for the 128bit to work properly). 3rd party developers have said that this was showing a 5%+ improvement...

Again, let me be clear that I haven't said this is what's GOING to happen...but it certainly could, and quite easily. In other words, I'm not holding my breath for it (or for Nehalem either for that matter). We won't know until we know, and the Fat Lady isn't even awake yet...let alone singing.

 

[Viditor]

Originally posted by: theprodigalrebel
It's not fake, it is an Engineering Sample with an unlocked multiplier. Notice how all the CPUs - Yorkfield, Kentsfield, Brisbane, Windsor, Conroe - in that article are running at 3GHz. They are trying to demonstrate performance across a variety of chips all running at the same clockspeed, nothing fishy here.

Actually, all 3 of the tests on this site smell bad...

All tests run at 3 GHz, Mem Frequency 375 Mhz (they say that Phenom forces this, though AMD Overdrive specs say differently)

Test 1, Crysis

VCore = 1.568

Test 2, SuperPi

VCore = 1.488

Test 3, 3D Mark 06

VCore = 1.184


Second issue...2 of the tests were run in single channel memory, while the SuperPi test was Dual channel.
They mention that the SuperPi was run at better memory timings (3-3-3-9 @1T), but on the same memory and setup.
Stranger still, in the 3DMark article, they even say the reason for it showing up as single channel is:
"That's because PhenomX4 have two memory controller, one controller controls one memory module. In this way when system performing multiple task, the performance may boost little higher"

However, why then doesn't that happen in the SuperPi test??

Also, they state that the shipped clockspeed of the 9700 is 2.6GHz, when we know that it's 2.4 GHz...

I'm calling BS on these "benches"...they just smell bad.

 

[harpoon84]

Originally posted by: Viditor

Originally posted by: harpoon84

Originally posted by: Viditor

Originally posted by: harpoon84
LOL, they do, but it's pre-release so considered a leak.

And it's an engineering sample chip on an early bios as well, so it's probably not as meaningful as some believe it to be.

Correct me if I'm wrong, but didn't you expect Phenom to be faster than Penryn clock for clock? Do you still think that will be the case with a retail stepping and updated BIOS?

I honestly don't know either way (none of us do yet)...that's the point.
But I certainly think it's easily possible...

I ain't gonna bother digging up old posts, but that's certainly a backtrack on your previous expecations.

 

[ayabe]

After launch I would say it will still take 6 months or so before we can really the gauge the potential of the architecture after another stepping or two is released along with BIOS tweaks. this happens with Intel too some of us seem to forget.

But this all needs to happen in a short period of time; when Penryn gets released and everyone is clocking them at 4ghz on air and AMD will be hurting....again.

 

[bradley]

To be honest, I wouldn't even bother visiting here without the balance brought by posters like Viditor. Except for the information he parlayed in this thread, there's nothing to distinguish it from total redundancy. The subject matter varies, but the comments and posters remain predictable.

BTW, have any of these so-called 'benches' been run on a true AM2+ system? I'm trying to find out, but the link won't resolve. Cause the only thing these test truly tell me is AMD might have a major security leak/breach.

 

[bradley]

Originally posted by: ayabe
After launch I would say it will still take 6 months or so before we can really the gauge the potential of the architecture after another stepping or two is released along with BIOS tweaks. this happens with Intel too some of us seem to forget.

But this all needs to happen in a short period of time; when Penryn gets released and everyone is clocking them at 4ghz on air and AMD will be hurting....again.

I guess it depends on which chickens you plan on hatching first.

 

[nonameo]

We forget that there are 2 modes for the memory controller of phenom: ganged and unganged.

Ganged: memory controller acts as 1 128 bit memory controller
unganged: acts as 2 64 bit controllers

granted, this can only show minor performance increases.

 

[jones377]

It looks like we'll get one benchmark per day from this site. Now they have posted Cinebench

http://www.expreview.com/news/...1194427976d6843_1.html

 

[bradley]

This is like writing a term paper, and using Wikipedia, or better yet the Inquirer, as your primary source of information. At that point, you get what you deserve.

11 hours/11 days and counting....

 

[zsdersw]

Originally posted by: bradley
This is like writing a term paper, and using Wikipedia, or better yet the Inquirer, as your primary source of information. At that point, you get what you deserve.

11 hours/11 days and counting....

Would you be saying these things if the results were favorable to AMD and everyone was drooling over them?

 

[bradley]

Originally posted by: zsdersw

Would you be saying these things if the results were favorable to AMD and everyone was drooling over them?

I'll continue to uphold a level of intellectual honesty long after we're done making keychains out of both Phenoms and Penryns. Do you mean to tell me no one here has ever taken a college logic and critical reasoning course?

 

[Stoneburner]

Originally posted by: zsdersw

Originally posted by: bradley
This is like writing a term paper, and using Wikipedia, or better yet the Inquirer, as your primary source of information. At that point, you get what you deserve.

11 hours/11 days and counting....

Would you be saying these things if the results were favorable to AMD and everyone was drooling over them?

how many times have you asked this question of various posters?

 

[bradley]

Originally posted by: Stoneburner

how many times have you asked this question of various posters?

And here I thought I was special or something.

 

[zsdersw]

Originally posted by: bradley
I'll continue to uphold a level of intellectual honesty long after we're done making keychains out of both Phenoms and Penryns. Do you mean to tell me no one here has ever taken a college logic and critical reasoning course?

I don't mean to tell you anything... just asking a question.

 

[zsdersw]

Originally posted by: Stoneburner
how many times have you asked this question of various posters?

A few. Do you have a problem with it? If so, T.S.

 

[Viditor]

Originally posted by: zsdersw

Originally posted by: bradley
This is like writing a term paper, and using Wikipedia, or better yet the Inquirer, as your primary source of information. At that point, you get what you deserve.

11 hours/11 days and counting....

Would you be saying these things if the results were favorable to AMD and everyone was drooling over them?

Would you be asking that question if the poster was an obvious Intel fanboy and falling into your agenda?

 

[bryanW1995]

Originally posted by: bradley
To be honest, I wouldn't even bother visiting here without the balance brought by posters like Viditor. Except for the information he parlayed in this thread, there's nothing to distinguish it from total redundancy. The subject matter varies, but the comments and posters remain predictable.

BTW, have any of these so-called 'benches' been run on a true AM2+ system? I'm trying to find out, but the link won't resolve. Cause the only thing these test truly tell me is AMD might have a major security leak/breach.

I haven't been able to find any am2+ mobos yet. That stupid biostar am2/am2+ unit on newegg doesn't count, either.

 

[bryanW1995]

Originally posted by: zsdersw

Originally posted by: Stoneburner
how many times have you asked this question of various posters?

A few. Do you have a problem with it? If so, T.S.

maybe you would be better off posting on c2d threads because you seem to be pretty sceptical of anything that disagrees with your theories on cpu architecture.

 

[harpoon84]

http://www.expreview.com/news/...1194514883d6863_1.html

RETAIL stepping Phenoms this time. Hows it looking Viditor?